[llvm-commits] [llvm] r137838 - /llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp

[Owen Anderson]

Author: resistor
Date: Wed Aug 17 13:14:48 2011
New Revision: 137838

URL: http://llvm.org/viewvc/llvm-project?rev=137838&view=rev
Log:
Be more careful in the Thumb decoder hooks to avoid walking off the end of the OpInfo array.

Modified:
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp?rev=137838&r1=137837&r2=137838&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp Wed Aug 17 13:14:48 2011
@@ -329,17 +329,18 @@
 // that as a post-pass.
 static void AddThumb1SBit(MCInst &MI, bool InITBlock) {
   const MCOperandInfo *OpInfo = ARMInsts[MI.getOpcode()].OpInfo;
+  unsigned short NumOps = ARMInsts[MI.getOpcode()].NumOperands;
   MCInst::iterator I = MI.begin();
-  for (unsigned i = 0, e = MI.size(); i < e; ++i, ++I) {
+  for (unsigned i = 0; i < NumOps; ++i, ++I) {
+    if (I == MI.end()) break;
     if (OpInfo[i].isOptionalDef() && OpInfo[i].RegClass == ARM::CCRRegClassID) {
+      if (i > 0 && OpInfo[i-1].isPredicate()) continue;
       MI.insert(I, MCOperand::CreateReg(InITBlock ? 0 : ARM::CPSR));
       return;
     }
   }
 
-  if (OpInfo[MI.size()].isOptionalDef() &&
-      OpInfo[MI.size()].RegClass == ARM::CCRRegClassID)
-    MI.insert(MI.end(), MCOperand::CreateReg(InITBlock ? 0 : ARM::CPSR));
+  MI.insert(I, MCOperand::CreateReg(InITBlock ? 0 : ARM::CPSR));
 }
 
 // Most Thumb instructions don't have explicit predicates in the
@@ -367,8 +368,10 @@
     CC = ARMCC::AL;
 
   const MCOperandInfo *OpInfo = ARMInsts[MI.getOpcode()].OpInfo;
+  unsigned short NumOps = ARMInsts[MI.getOpcode()].NumOperands;
   MCInst::iterator I = MI.begin();
-  for (unsigned i = 0, e = MI.size(); i < e; ++i, ++I) {
+  for (unsigned i = 0; i < NumOps; ++i, ++I) {
+    if (I == MI.end()) break;
     if (OpInfo[i].isPredicate()) {
       I = MI.insert(I, MCOperand::CreateImm(CC));
       ++I;
@@ -380,11 +383,12 @@
     }
   }
 
-  MI.insert(MI.end(), MCOperand::CreateImm(CC));
+  I = MI.insert(I, MCOperand::CreateImm(CC));
+  ++I;
   if (CC == ARMCC::AL)
-    MI.insert(MI.end(), MCOperand::CreateReg(0));
+    MI.insert(I, MCOperand::CreateReg(0));
   else
-    MI.insert(MI.end(), MCOperand::CreateReg(ARM::CPSR));
+    MI.insert(I, MCOperand::CreateReg(ARM::CPSR));
 }
 
 // Thumb VFP instructions are a special case.  Because we share their