[llvm-commits] [llvm] r137759 - in /llvm/trunk: lib/Target/ARM/AsmParser/ARMAsmParser.cpp test/MC/ARM/basic-thumb-instructions.s
Jim Grosbach
grosbach at apple.com
Tue Aug 16 14:34:08 PDT 2011
Author: grosbach
Date: Tue Aug 16 16:34:08 2011
New Revision: 137759
URL: http://llvm.org/viewvc/llvm-project?rev=137759&view=rev
Log:
Thumb assembly parsing and encoding for ADD(register) instruction.
Added:
llvm/trunk/test/MC/ARM/basic-thumb-instructions.s
Modified:
llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
Modified: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp?rev=137759&r1=137758&r2=137759&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Tue Aug 16 16:34:08 2011
@@ -2757,6 +2757,15 @@
static_cast<ARMOperand*>(Operands[4])->isImm0_65535Expr() &&
static_cast<ARMOperand*>(Operands[1])->getReg() == 0)
return true;
+
+ // Register-register 'add' for thumb does not have a cc_out operand
+ // when there are only two register operands.
+ if (isThumb() && Mnemonic == "add" && Operands.size() == 5 &&
+ static_cast<ARMOperand*>(Operands[3])->isReg() &&
+ static_cast<ARMOperand*>(Operands[4])->isReg() &&
+ static_cast<ARMOperand*>(Operands[1])->getReg() == 0)
+ return true;
+
return false;
}
Added: llvm/trunk/test/MC/ARM/basic-thumb-instructions.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-thumb-instructions.s?rev=137759&view=auto
==============================================================================
--- llvm/trunk/test/MC/ARM/basic-thumb-instructions.s (added)
+++ llvm/trunk/test/MC/ARM/basic-thumb-instructions.s Tue Aug 16 16:34:08 2011
@@ -0,0 +1,21 @@
+@ RUN: llvm-mc -triple=thumbv6-apple-darwin -show-encoding < %s | FileCheck %s
+ .syntax unified
+ .globl _func
+
+@ Check that the assembler can handle the documented syntax from the ARM ARM.
+@ For complex constructs like shifter operands, check more thoroughly for them
+@ once then spot check that following instructions accept the form generally.
+@ This gives us good coverage while keeping the overall size of the test
+@ more reasonable.
+
+_func:
+@ CHECK: _func
+
+ at ------------------------------------------------------------------------------
+@ ADD (register)
+ at ------------------------------------------------------------------------------
+ adds r1, r2, r3
+ add r2, r8
+
+@ CHECK: adds r1, r2, r3 @ encoding: [0xd1,0x18]
+@ CHECK: add r2, r8 @ encoding: [0x42,0x44]
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