[llvm-commits] [llvm] r137282 - in /llvm/trunk/lib/Target/ARM: ARMInstrInfo.td Disassembler/ARMDisassembler.cpp
Jim Grosbach
grosbach at apple.com
Wed Aug 10 16:43:54 PDT 2011
Author: grosbach
Date: Wed Aug 10 18:43:54 2011
New Revision: 137282
URL: http://llvm.org/viewvc/llvm-project?rev=137282&view=rev
Log:
ARM LDRT assembly parsing and encoding.
Modified:
llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=137282&r1=137281&r2=137282&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Wed Aug 10 18:43:54 2011
@@ -2063,39 +2063,40 @@
// LDRT, LDRBT, LDRSBT, LDRHT, LDRSHT are for disassembly only.
let mayLoad = 1, neverHasSideEffects = 1 in {
-def LDRTr : AI2ldstidx<1, 0, 0, (outs GPR:$Rt, GPR:$base_wb),
- (ins ldst_so_reg:$addr), IndexModePost, LdFrm, IIC_iLoad_ru,
- "ldrt", "\t$Rt, $addr", "$addr.base = $base_wb", []> {
- // {17-14} Rn
- // {13} 1 == Rm, 0 == imm12
+
+def LDRT_POST_REG : AI2ldstidx<1, 0, 0, (outs GPR:$Rt, GPR:$Rn_wb),
+ (ins addr_offset_none:$addr, am2offset_reg:$offset),
+ IndexModePost, LdFrm, IIC_iLoad_ru,
+ "ldrt", "\t$Rt, $addr, $offset",
+ "$addr.base = $Rn_wb", []> {
// {12} isAdd
// {11-0} imm12/Rm
- bits<18> addr;
+ bits<14> offset;
+ bits<4> addr;
let Inst{25} = 1;
- let Inst{23} = addr{12};
+ let Inst{23} = offset{12};
let Inst{21} = 1; // overwrite
- let Inst{19-16} = addr{17-14};
- let Inst{11-5} = addr{11-5};
+ let Inst{19-16} = addr;
+ let Inst{11-5} = offset{11-5};
let Inst{4} = 0;
- let Inst{3-0} = addr{3-0};
- let AsmMatchConverter = "cvtLdWriteBackRegAddrMode2";
+ let Inst{3-0} = offset{3-0};
let DecoderMethod = "DecodeAddrMode2IdxInstruction";
}
-def LDRTi : AI2ldstidx<1, 0, 0, (outs GPR:$Rt, GPR:$base_wb),
- (ins addrmode_imm12:$addr),
+
+def LDRT_POST_IMM : AI2ldstidx<1, 0, 0, (outs GPR:$Rt, GPR:$Rn_wb),
+ (ins addr_offset_none:$addr, am2offset_imm:$offset),
IndexModePost, LdFrm, IIC_iLoad_ru,
- "ldrt", "\t$Rt, $addr", "$addr.base = $base_wb", []> {
- // {17-14} Rn
- // {13} 1 == Rm, 0 == imm12
+ "ldrt", "\t$Rt, $addr, $offset",
+ "$addr.base = $Rn_wb", []> {
// {12} isAdd
// {11-0} imm12/Rm
- bits<18> addr;
+ bits<14> offset;
+ bits<4> addr;
let Inst{25} = 0;
- let Inst{23} = addr{12};
+ let Inst{23} = offset{12};
let Inst{21} = 1; // overwrite
- let Inst{19-16} = addr{17-14};
- let Inst{11-0} = addr{11-0};
- let AsmMatchConverter = "cvtLdWriteBackRegAddrMode2";
+ let Inst{19-16} = addr;
+ let Inst{11-0} = offset{11-0};
let DecoderMethod = "DecodeAddrMode2IdxInstruction";
}
Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp?rev=137282&r1=137281&r2=137282&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp Wed Aug 10 18:43:54 2011
@@ -953,8 +953,8 @@
case ARM::LDR_PRE:
case ARM::LDRBT_POST_REG:
case ARM::LDRBT_POST_IMM:
- case ARM::LDRTr:
- case ARM::LDRTi:
+ case ARM::LDRT_POST_REG:
+ case ARM::LDRT_POST_IMM:
DecodeGPRRegisterClass(Inst, Rn, Address, Decoder);
break;
default:
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