[llvm-commits] [patch][arm] Implement support for the Q, R and H modifiers

[Rafael Ávila de Espíndola]

>>> This means that in the case of stm/ldm instructions with the 'Q'
>>> and 'R' modifiers that we'd get registers that weren't meant,
>>> leading to subtle problems that users would need to debug. When
>>> we get support for assigning values into consecutive registers
>>> this won't be a problem.
>>>
>>> What are your thoughts?
>>
>> This is the first time I have seen these constraints, so I don't
>> know how common they are and of those uses which ones assume
>> sequential registers.
>>
>
> Btw, these are modifiers not constraints just to be careful about
> it.

Well, they will be both once we implement the constraint that the 
arguments must be paired.

>> So, I guess this is a judgment call. The current patch allows us to
>> handle some inline asm but causes us to miscompile others that we
>> currently reject.
>
> I'm going to say we should add them for now. People that are using it
> incorrectly may get a hard to debug problem, but the use case you
> guys have totally makes sense and isn't necessarily easy to rewrite
> to make more sense. Though, seriously, what's wrong with a .s file
> for that function?

I would probably have used a .s file myself. I think in this case the 
preference was for inline assembly because the full function looks like

#if x86
...
#else if arm
...
#else
C fallback
#endif

> -eric

Thanks,
Rafael