[llvm-commits] [PATCH] miscompile due to incorrect MOVSS pattern

[Tanya Lattner]

I believe the following X86 pattern is incorrect:
def : Pat<(X86Movss VR128:$src1,
                    (bc_v4i32 (v2i64 (load addr:$src2)))),
          (MOVLPSrm VR128:$src1, addr:$src2)>;

This matches a MOVSS dag with a MOVLPS instruction. However, MOVSS will replace only the low 32 bits of the register, while the MOVLPS instruction will replace the low 64 bits.

I've added my test case that illustrates the bug and also modified the one that was already present.

Bruno - You seem to have added this pattern, so let me know if this is supposed to use some other instruction. It's not clear what you're trying to achieve with this pattern, so  my patch just removes it.

Thanks,
Tanya

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