[llvm-commits] [llvm] r137146 - in /llvm/trunk: lib/Target/ARM/Disassembler/ARMDisassembler.cpp test/MC/Disassembler/ARM/invalid-Bcc-thumb.txt

[Owen Anderson]

Author: resistor
Date: Tue Aug  9 16:07:45 2011
New Revision: 137146

URL: http://llvm.org/viewvc/llvm-project?rev=137146&view=rev
Log:
Tighten Thumb1 branch predicate decoding.

Modified:
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
    llvm/trunk/test/MC/Disassembler/ARM/invalid-Bcc-thumb.txt

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp?rev=137146&r1=137145&r2=137146&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassembler.cpp Tue Aug  9 16:07:45 2011
@@ -592,6 +592,9 @@
 static bool DecodePredicateOperand(llvm::MCInst &Inst, unsigned Val,
                                uint64_t Address, const void *Decoder) {
   if (Val == 0xF) return false;
+  // AL predicate is not allowed on Thumb1 branches.
+  if (Inst.getOpcode() == ARM::tBcc && Val == 0xE)
+    return false;
   Inst.addOperand(MCOperand::CreateImm(Val));
   if (Val == ARMCC::AL) {
     Inst.addOperand(MCOperand::CreateReg(0));

Modified: llvm/trunk/test/MC/Disassembler/ARM/invalid-Bcc-thumb.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/invalid-Bcc-thumb.txt?rev=137146&r1=137145&r2=137146&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/invalid-Bcc-thumb.txt (original)
+++ llvm/trunk/test/MC/Disassembler/ARM/invalid-Bcc-thumb.txt Tue Aug  9 16:07:45 2011
@@ -1,5 +1,4 @@
 # RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 |& grep {invalid instruction encoding}
-# XFAIL: *
 
 # Opcode=2249 Name=tBcc Format=ARM_FORMAT_THUMBFRM(25)
 #  31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0