[llvm-commits] [patch][arm] Implement support for the Q, R and H modifiers

[Evan Cheng]

+    case 'H': // The highest-numbered register of a pair.
+    case 'R': // The most significant register of a pair.
+    case 'Q': { // The least significant register of a pair.
+      unsigned RegOp = ExtraCode[0] == 'Q' ? OpNum : OpNum + 1;
+      const MachineOperand &MO = MI->getOperand(RegOp);

This assumes the operand is the low register of the pair, i.e. even. Is that guaranteed?

Evan

On Aug 4, 2011, at 12:59 PM, Rafael Ávila de Espíndola wrote:

> The attached patch adds support for the Q, R and H inline asm modifiers.
> 
> GCC supports them but they are not documented (other than in source code comments).
> 
> Cheers,
> Rafael
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