[llvm-commits] [llvm] r136707 - /llvm/trunk/lib/Target/ARM/ARMInstrVFP.td
Owen Anderson
resistor at mac.com
Tue Aug 2 11:30:00 PDT 2011
Author: resistor
Date: Tue Aug 2 13:30:00 2011
New Revision: 136707
URL: http://llvm.org/viewvc/llvm-project?rev=136707&view=rev
Log:
Fix the broken encodings for the VFP vmov.f32 and vmov.f64 instructions, as well as the comments that explain them incorrectly.
Modified:
llvm/trunk/lib/Target/ARM/ARMInstrVFP.td
Modified: llvm/trunk/lib/Target/ARM/ARMInstrVFP.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrVFP.td?rev=136707&r1=136706&r2=136707&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrVFP.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrVFP.td Tue Aug 2 13:30:00 2011
@@ -36,6 +36,7 @@
return ARM::getVFPf32Imm(N->getValueAPF()) != -1;
}]> {
let PrintMethod = "printVFPf32ImmOperand";
+ let DecoderMethod = "DecodeVFPfpImm";
}
def vfp_f64imm : Operand<f64>,
@@ -43,6 +44,7 @@
return ARM::getVFPf64Imm(N->getValueAPF()) != -1;
}]> {
let PrintMethod = "printVFPf64ImmOperand";
+ let DecoderMethod = "DecodeVFPfpImm";
}
@@ -1091,9 +1093,9 @@
// Encode instruction operands.
let Inst{15-12} = Dd{3-0};
let Inst{22} = Dd{4};
- let Inst{19} = imm{31};
- let Inst{18-16} = imm{22-20};
- let Inst{3-0} = imm{19-16};
+ let Inst{19} = imm{31}; // The immediate is handled as a float.
+ let Inst{18-16} = imm{25-23};
+ let Inst{3-0} = imm{22-19};
// Encode remaining instruction bits.
let Inst{27-23} = 0b11101;
@@ -1114,9 +1116,9 @@
// Encode instruction operands.
let Inst{15-12} = Sd{4-1};
let Inst{22} = Sd{0};
- let Inst{19} = imm{31}; // The immediate is handled as a double.
- let Inst{18-16} = imm{22-20};
- let Inst{3-0} = imm{19-16};
+ let Inst{19} = imm{31}; // The immediate is handled as a float.
+ let Inst{18-16} = imm{25-23};
+ let Inst{3-0} = imm{22-19};
// Encode remaining instruction bits.
let Inst{27-23} = 0b11101;
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