[llvm-commits] [llvm] r136704 - in /llvm/trunk: lib/Target/ARM/ARMInstrInfo.td utils/TableGen/EDEmitter.cpp

[Bruno Cardoso Lopes]

Much better indeed! :)

On Tue, Aug 2, 2011 at 11:07 AM, Jim Grosbach <grosbach at apple.com> wrote:
> Author: grosbach
> Date: Tue Aug  2 13:07:32 2011
> New Revision: 136704
>
> URL: http://llvm.org/viewvc/llvm-project?rev=136704&view=rev
> Log:
> ARM: rename addrmode7 to addr_offset_none.
>
> Use a more descriptive name so the code is more self-documenting.
>
> Modified:
>    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
>    llvm/trunk/utils/TableGen/EDEmitter.cpp
>
> Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=136704&r1=136703&r2=136704&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
> +++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Tue Aug  2 13:07:32 2011
> @@ -726,12 +726,10 @@
>   let MIOperandInfo = (ops GPR, i32imm);
>  }
>
> -// addrmode7 := reg
> -// Used by load/store exclusive instructions. Useful to enable right assembly
> -// parsing and printing. Not used for any codegen matching.
> +// addr_offset_none := reg
>  //
>  def MemMode7AsmOperand : AsmOperandClass { let Name = "MemMode7"; }
> -def addrmode7 : Operand<i32> {
> +def addr_offset_none : Operand<i32> {
>   let PrintMethod = "printAddrMode7Operand";
>   let MIOperandInfo = (ops GPR);
>   let ParserMatchClass = MemMode7AsmOperand;
> @@ -3753,29 +3751,30 @@
>  }
>
>  let mayLoad = 1 in {
> -def LDREXB : AIldrex<0b10, (outs GPR:$Rt), (ins addrmode7:$addr), NoItinerary,
> +def LDREXB : AIldrex<0b10, (outs GPR:$Rt), (ins addr_offset_none:$addr),
> +                     NoItinerary,
>                     "ldrexb", "\t$Rt, $addr", []>;
> -def LDREXH : AIldrex<0b11, (outs GPR:$Rt), (ins addrmode7:$addr), NoItinerary,
> +def LDREXH : AIldrex<0b11, (outs GPR:$Rt), (ins addr_offset_none:$addr), NoItinerary,
>                     "ldrexh", "\t$Rt, $addr", []>;
> -def LDREX  : AIldrex<0b00, (outs GPR:$Rt), (ins addrmode7:$addr), NoItinerary,
> +def LDREX  : AIldrex<0b00, (outs GPR:$Rt), (ins addr_offset_none:$addr), NoItinerary,
>                     "ldrex", "\t$Rt, $addr", []>;
>  let hasExtraDefRegAllocReq = 1 in
> -  def LDREXD : AIldrex<0b01, (outs GPR:$Rt, GPR:$Rt2), (ins addrmode7:$addr),
> +def LDREXD: AIldrex<0b01, (outs GPR:$Rt, GPR:$Rt2),(ins addr_offset_none:$addr),
>                       NoItinerary, "ldrexd", "\t$Rt, $Rt2, $addr", []>;
>  }
>
>  let mayStore = 1, Constraints = "@earlyclobber $Rd" in {
> -def STREXB : AIstrex<0b10, (outs GPR:$Rd), (ins GPR:$Rt, addrmode7:$addr),
> +def STREXB: AIstrex<0b10, (outs GPR:$Rd), (ins GPR:$Rt, addr_offset_none:$addr),
>                     NoItinerary, "strexb", "\t$Rd, $Rt, $addr", []>;
> -def STREXH : AIstrex<0b11, (outs GPR:$Rd), (ins GPR:$Rt, addrmode7:$addr),
> +def STREXH: AIstrex<0b11, (outs GPR:$Rd), (ins GPR:$Rt, addr_offset_none:$addr),
>                     NoItinerary, "strexh", "\t$Rd, $Rt, $addr", []>;
> -def STREX  : AIstrex<0b00, (outs GPR:$Rd), (ins GPR:$Rt, addrmode7:$addr),
> +def STREX : AIstrex<0b00, (outs GPR:$Rd), (ins GPR:$Rt, addr_offset_none:$addr),
>                     NoItinerary, "strex", "\t$Rd, $Rt, $addr", []>;
>  }
>
>  let hasExtraSrcRegAllocReq = 1, Constraints = "@earlyclobber $Rd" in
>  def STREXD : AIstrex<0b01, (outs GPR:$Rd),
> -                    (ins GPR:$Rt, GPR:$Rt2, addrmode7:$addr),
> +                    (ins GPR:$Rt, GPR:$Rt2, addr_offset_none:$addr),
>                     NoItinerary, "strexd", "\t$Rd, $Rt, $Rt2, $addr", []>;
>
>  // Clear-Exclusive is for disassembly only.
> @@ -3787,8 +3786,10 @@
>
>  // SWP/SWPB are deprecated in V6/V7.
>  let mayLoad = 1, mayStore = 1 in {
> -def SWP : AIswp<0, (outs GPR:$Rt), (ins GPR:$Rt2, addrmode7:$addr), "swp", []>;
> -def SWPB: AIswp<1, (outs GPR:$Rt), (ins GPR:$Rt2, addrmode7:$addr), "swpb", []>;
> +def SWP : AIswp<0, (outs GPR:$Rt), (ins GPR:$Rt2, addr_offset_none:$addr),
> +                "swp", []>;
> +def SWPB: AIswp<1, (outs GPR:$Rt), (ins GPR:$Rt2, addr_offset_none:$addr),
> +                "swpb", []>;
>  }
>
>  //===----------------------------------------------------------------------===//
>
> Modified: llvm/trunk/utils/TableGen/EDEmitter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/EDEmitter.cpp?rev=136704&r1=136703&r2=136704&view=diff
> ==============================================================================
> --- llvm/trunk/utils/TableGen/EDEmitter.cpp (original)
> +++ llvm/trunk/utils/TableGen/EDEmitter.cpp Tue Aug  2 13:07:32 2011
> @@ -651,7 +651,7 @@
>   MISC("addrmode6dup", "kOperandTypeARMAddrMode6");               // R, R, I, I
>   MISC("addrmode6oneL32", "kOperandTypeARMAddrMode6");            // R, R, I, I
>   MISC("addrmodepc", "kOperandTypeARMAddrModePC");                // R, I
> -  MISC("addrmode7", "kOperandTypeARMAddrMode7");                  // R
> +  MISC("addr_offset_none", "kOperandTypeARMAddrMode7");           // R
>   MISC("reglist", "kOperandTypeARMRegisterList");                 // I, R, ...
>   MISC("dpr_reglist", "kOperandTypeARMDPRRegisterList");          // I, R, ...
>   MISC("spr_reglist", "kOperandTypeARMSPRRegisterList");          // I, R, ...
>
>
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-- 
Bruno Cardoso Lopes
http://www.brunocardoso.cc