[llvm-commits] [llvm] r136475 - /llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

Jim Grosbach grosbach at apple.com
Fri Jul 29 10:51:39 PDT 2011


Author: grosbach
Date: Fri Jul 29 12:51:39 2011
New Revision: 136475

URL: http://llvm.org/viewvc/llvm-project?rev=136475&view=rev
Log:
ARM SRS and RFE instructions are not code-gen only.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=136475&r1=136474&r2=136475&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Fri Jul 29 12:51:39 2011
@@ -1721,11 +1721,10 @@
 }
 }
 
-// Store Return State is a system instruction -- for disassembly only
-let isCodeGenOnly = 1 in {  // FIXME: This should not use submode!
+// Store Return State
+// FIXME: This should not use submode!
 def SRSW : ABXI<{1,0,0,?}, (outs), (ins ldstm_mode:$amode, i32imm:$mode),
-                NoItinerary, "srs${amode}\tsp!, $mode",
-                [/* For disassembly only; pattern left blank */]> {
+                NoItinerary, "srs${amode}\tsp!, $mode", []> {
   let Inst{31-28} = 0b1111;
   let Inst{22-20} = 0b110; // W = 1
   let Inst{19-8} = 0xd05;
@@ -1733,31 +1732,27 @@
 }
 
 def SRS  : ABXI<{1,0,0,?}, (outs), (ins ldstm_mode:$amode, i32imm:$mode),
-                NoItinerary, "srs${amode}\tsp, $mode",
-                [/* For disassembly only; pattern left blank */]> {
+                NoItinerary, "srs${amode}\tsp, $mode", []> {
   let Inst{31-28} = 0b1111;
   let Inst{22-20} = 0b100; // W = 0
   let Inst{19-8} = 0xd05;
   let Inst{7-5} = 0b000;
 }
 
-// Return From Exception is a system instruction -- for disassembly only
+// Return From Exception
 def RFEW : ABXI<{1,0,0,?}, (outs), (ins ldstm_mode:$amode, GPR:$base),
-                NoItinerary, "rfe${amode}\t$base!",
-                [/* For disassembly only; pattern left blank */]> {
+                NoItinerary, "rfe${amode}\t$base!", []> {
   let Inst{31-28} = 0b1111;
   let Inst{22-20} = 0b011; // W = 1
   let Inst{15-0} = 0x0a00;
 }
 
 def RFE  : ABXI<{1,0,0,?}, (outs), (ins ldstm_mode:$amode, GPR:$base),
-                NoItinerary, "rfe${amode}\t$base",
-                [/* For disassembly only; pattern left blank */]> {
+                NoItinerary, "rfe${amode}\t$base", []> {
   let Inst{31-28} = 0b1111;
   let Inst{22-20} = 0b001; // W = 0
   let Inst{15-0} = 0x0a00;
 }
-} // isCodeGenOnly = 1
 
 //===----------------------------------------------------------------------===//
 //  Load / store Instructions.





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