[llvm-commits] [llvm] r136282 - /llvm/trunk/test/MC/ARM/basic-arm-instructions.s

[Jim Grosbach]

Author: grosbach
Date: Wed Jul 27 17:13:08 2011
New Revision: 136282

URL: http://llvm.org/viewvc/llvm-project?rev=136282&view=rev
Log:
ARM assembly parsing and encoding tests for UQSUB16 and UQSUB8.

Modified:
    llvm/trunk/test/MC/ARM/basic-arm-instructions.s

Modified: llvm/trunk/test/MC/ARM/basic-arm-instructions.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-arm-instructions.s?rev=136282&r1=136281&r2=136282&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/basic-arm-instructions.s (original)
+++ llvm/trunk/test/MC/ARM/basic-arm-instructions.s Wed Jul 27 17:13:08 2011
@@ -2131,3 +2131,16 @@
 @ CHECK: uqsax	r1, r3, r7              @ encoding: [0x57,0x1f,0x63,0xe6]
 @ CHECK: uqsax	r3, r6, r2              @ encoding: [0x52,0x3f,0x66,0xe6]
 
+
+ at ------------------------------------------------------------------------------
+@ UQSUB16/UQSUB8
+ at ------------------------------------------------------------------------------
+        uqsub16 r1, r5, r3
+        uqsub16gt r3, r2, r5
+        uqsub8 r2, r1, r4
+        uqsub8le r4, r6, r9
+
+@ CHECK: uqsub16	r1, r5, r3      @ encoding: [0x73,0x1f,0x65,0xe6]
+@ CHECK: uqsub16gt	r3, r2, r5      @ encoding: [0x75,0x3f,0x62,0xc6]
+@ CHECK: uqsub8	r2, r1, r4              @ encoding: [0xf4,0x2f,0x61,0xe6]
+@ CHECK: uqsub8le	r4, r6, r9      @ encoding: [0xf9,0x4f,0x66,0xd6]