[llvm-commits] [llvm] r135954 - in /llvm/trunk/lib/Target: ARM/ARM.h ARM/MCTargetDesc/ARMBaseInfo.h PowerPC/MCTargetDesc/PPCBaseInfo.h PowerPC/PPC.h X86/X86.h

[Evan Cheng]

Author: evancheng
Date: Mon Jul 25 15:18:48 2011
New Revision: 135954

URL: http://llvm.org/viewvc/llvm-project?rev=135954&view=rev
Log:
Code clean up.

Modified:
    llvm/trunk/lib/Target/ARM/ARM.h
    llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMBaseInfo.h
    llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCBaseInfo.h
    llvm/trunk/lib/Target/PowerPC/PPC.h
    llvm/trunk/lib/Target/X86/X86.h

Modified: llvm/trunk/lib/Target/ARM/ARM.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARM.h?rev=135954&r1=135953&r2=135954&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARM.h (original)
+++ llvm/trunk/lib/Target/ARM/ARM.h Mon Jul 25 15:18:48 2011
@@ -29,13 +29,7 @@
 class FunctionPass;
 class JITCodeEmitter;
 class MachineInstr;
-class MCCodeEmitter;
 class MCInst;
-class MCInstrInfo;
-class MCObjectWriter;
-class MCSubtargetInfo;
-class TargetAsmBackend;
-class formatted_raw_ostream;
 
 FunctionPass *createARMISelDag(ARMBaseTargetMachine &TM,
                                CodeGenOpt::Level OptLevel);

Modified: llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMBaseInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMBaseInfo.h?rev=135954&r1=135953&r2=135954&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMBaseInfo.h (original)
+++ llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMBaseInfo.h Mon Jul 25 15:18:48 2011
@@ -20,9 +20,6 @@
 #include "ARMMCTargetDesc.h"
 #include "llvm/Support/ErrorHandling.h"
 
-// Note that the following auto-generated files only defined enum types, and
-// so are safe to include here.
-
 namespace llvm {
 
 // Enums corresponding to ARM condition codes

Modified: llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCBaseInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCBaseInfo.h?rev=135954&r1=135953&r2=135954&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCBaseInfo.h (original)
+++ llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCBaseInfo.h Mon Jul 25 15:18:48 2011
@@ -22,7 +22,7 @@
 
 namespace llvm {
 
-/// getRegisterNumbering - Given the enum value for some register, e.g.
+/// getPPCRegisterNumbering - Given the enum value for some register, e.g.
 /// PPC::F14, return the number that it corresponds to (e.g. 14).
 inline static unsigned getPPCRegisterNumbering(unsigned RegEnum) {
   using namespace PPC;

Modified: llvm/trunk/lib/Target/PowerPC/PPC.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPC.h?rev=135954&r1=135953&r2=135954&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPC.h (original)
+++ llvm/trunk/lib/Target/PowerPC/PPC.h Mon Jul 25 15:18:48 2011
@@ -31,12 +31,7 @@
   class MachineInstr;
   class AsmPrinter;
   class MCInst;
-  class MCCodeEmitter;
-  class MCContext;
-  class MCInstrInfo;
-  class MCSubtargetInfo;
   class TargetMachine;
-  class TargetAsmBackend;
   
   FunctionPass *createPPCBranchSelectionPass();
   FunctionPass *createPPCISelDag(PPCTargetMachine &TM);

Modified: llvm/trunk/lib/Target/X86/X86.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86.h?rev=135954&r1=135953&r2=135954&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86.h (original)
+++ llvm/trunk/lib/Target/X86/X86.h Mon Jul 25 15:18:48 2011
@@ -25,16 +25,8 @@
 class FunctionPass;
 class JITCodeEmitter;
 class MachineCodeEmitter;
-class MCCodeEmitter;
-class MCContext;
-class MCInstrInfo;
-class MCObjectWriter;
-class MCSubtargetInfo;
 class Target;
-class TargetAsmBackend;
 class X86TargetMachine;
-class formatted_raw_ostream;
-class raw_ostream;
 
 /// createX86ISelDag - This pass converts a legalized DAG into a 
 /// X86-specific DAG, ready for instruction scheduling.