[llvm-commits] [llvm] r135817 - in /llvm/trunk: lib/Target/ARM/AsmParser/ARMAsmParser.cpp test/MC/ARM/basic-arm-instructions.s

[Jim Grosbach]

Author: grosbach
Date: Fri Jul 22 17:06:05 2011
New Revision: 135817

URL: http://llvm.org/viewvc/llvm-project?rev=135817&view=rev
Log:
ARM assembly parsing and encoding updates.

Tests for SMULBB, SMLALBT, SMLALTB, SMLALTT, and SMULL. Fix parsing of SMULLS.

Modified:
    llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
    llvm/trunk/test/MC/ARM/basic-arm-instructions.s

Modified: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp?rev=135817&r1=135816&r2=135817&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Fri Jul 22 17:06:05 2011
@@ -2153,7 +2153,7 @@
   // First, split out any predication code. Ignore mnemonics we know aren't
   // predicated but do have a carry-set and so weren't caught above.
   if (Mnemonic != "adcs" && Mnemonic != "bics" && Mnemonic != "movs" &&
-      Mnemonic != "muls" && Mnemonic != "smlals") {
+      Mnemonic != "muls" && Mnemonic != "smlals" && Mnemonic != "smulls") {
     unsigned CC = StringSwitch<unsigned>(Mnemonic.substr(Mnemonic.size()-2))
       .Case("eq", ARMCC::EQ)
       .Case("ne", ARMCC::NE)

Modified: llvm/trunk/test/MC/ARM/basic-arm-instructions.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-arm-instructions.s?rev=135817&r1=135816&r2=135817&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/basic-arm-instructions.s (original)
+++ llvm/trunk/test/MC/ARM/basic-arm-instructions.s Fri Jul 22 17:06:05 2011
@@ -1550,6 +1550,36 @@
 @ CHECK: smuadlt	r2, r3, r4      @ encoding: [0x13,0xf4,0x02,0xb7]
 @ CHECK: smuadxge	r3, r2, r1      @ encoding: [0x32,0xf1,0x03,0xa7]
 
+
+ at ------------------------------------------------------------------------------
+@ SMULBB/SMLALBT/SMLALTB/SMLALTT
+ at ------------------------------------------------------------------------------
+        smulbb r3, r9, r0
+        smulbt r5, r4, r1
+        smultb r4, r2, r2
+        smultt r8, r3, r4
+        smulbbge r1, r9, r0
+        smulbtle r5, r6, r4
+        smultbne r2, r3, r2
+        smultteq r8, r3, r4
+
+@ CHECK: smulbb	r3, r9, r0              @ encoding: [0x89,0x00,0x63,0xe1]
+@ CHECK: smulbt	r5, r4, r1              @ encoding: [0xc4,0x01,0x65,0xe1]
+@ CHECK: smultb	r4, r2, r2              @ encoding: [0xa2,0x02,0x64,0xe1]
+@ CHECK: smultt	r8, r3, r4              @ encoding: [0xe3,0x04,0x68,0xe1]
+@ CHECK: smulbbge	r1, r9, r0      @ encoding: [0x89,0x00,0x61,0xa1]
+@ CHECK: smulbtle	r5, r6, r4      @ encoding: [0xc6,0x04,0x65,0xd1]
+@ CHECK: smultbne	r2, r3, r2      @ encoding: [0xa3,0x02,0x62,0x11]
+@ CHECK: smultteq	r8, r3, r4      @ encoding: [0xe3,0x04,0x68,0x01]
+
+ at ------------------------------------------------------------------------------
+@ SMULL
+ at ------------------------------------------------------------------------------
+        smull r3, r9, r0, r1
+        smulls r3, r9, r0, r2
+        smulleq r8, r3, r4, r5
+        smullseq r8, r3, r4, r3
+
 @------------------------------------------------------------------------------
 @ STM*
 @------------------------------------------------------------------------------