[llvm-commits] [llvm] r135782 - in /llvm/trunk: lib/Target/ARM/ARMInstrInfo.td lib/Target/ARM/ARMInstrThumb2.td test/MC/ARM/basic-arm-instructions.s

Jim Grosbach grosbach at apple.com
Fri Jul 22 11:13:31 PDT 2011


Author: grosbach
Date: Fri Jul 22 13:13:31 2011
New Revision: 135782

URL: http://llvm.org/viewvc/llvm-project?rev=135782&view=rev
Log:
ARM assembly parsing and encoding for SMC instruction.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
    llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td
    llvm/trunk/test/MC/ARM/basic-arm-instructions.s

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=135782&r1=135781&r2=135782&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Fri Jul 22 13:13:31 2011
@@ -1742,8 +1742,8 @@
 
 
 // Secure Monitor Call is a system instruction -- for disassembly only
-def SMC : ABI<0b0001, (outs), (ins i32imm:$opt), NoItinerary, "smc", "\t$opt",
-              [/* For disassembly only; pattern left blank */]> {
+def SMC : ABI<0b0001, (outs), (ins imm0_15:$opt), NoItinerary, "smc", "\t$opt",
+              []> {
   bits<4> opt;
   let Inst{23-4} = 0b01100000000000000111;
   let Inst{3-0} = opt;

Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=135782&r1=135781&r2=135782&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Fri Jul 22 13:13:31 2011
@@ -3170,7 +3170,7 @@
 
 // Secure Monitor Call is a system instruction -- for disassembly only
 // Option = Inst{19-16}
-def t2SMC : T2I<(outs), (ins i32imm:$opt), NoItinerary, "smc", "\t$opt",
+def t2SMC : T2I<(outs), (ins imm0_15:$opt), NoItinerary, "smc", "\t$opt",
                 [/* For disassembly only; pattern left blank */]> {
   let Inst{31-27} = 0b11110;
   let Inst{26-20} = 0b1111111;

Modified: llvm/trunk/test/MC/ARM/basic-arm-instructions.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/basic-arm-instructions.s?rev=135782&r1=135781&r2=135782&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/basic-arm-instructions.s (original)
+++ llvm/trunk/test/MC/ARM/basic-arm-instructions.s Fri Jul 22 13:13:31 2011
@@ -1359,6 +1359,15 @@
 @ CHECK: shsub8	r4, r8, r2              @ encoding: [0xf2,0x4f,0x38,0xe6]
 @ CHECK: shsub8gt	r4, r8, r2      @ encoding: [0xf2,0x4f,0x38,0xc6]
 
+ at ------------------------------------------------------------------------------
+@ SMC
+ at ------------------------------------------------------------------------------
+        smc #0xf
+        smceq #0
+
+@ CHECK: smc	#15                     @ encoding: [0x7f,0x00,0x60,0xe1]
+@ CHECK: smceq	#0                      @ encoding: [0x70,0x00,0x60,0x01]
+
 
 @------------------------------------------------------------------------------
 @ STM*





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