[llvm-commits] [PATCH] TableGen CodeEmitter Backend for JITCodeEmitter

[Jim Grosbach]

This isn't what you want to do. The reason pseudos are excluded is that they don't have any binary information to emit. Adding them to the getBinaryCodeForInstr() won't help, as it won't return any bits of the instruction anyway.

Pseudos are handled in ARMCodeEmitter::emitPseudoInstruction(), and that function is required to fill in all required bits for the instruction(s) the pseudo expands to.

-Jim

On Jul 21, 2011, at 7:27 PM, Logan Chien wrote:

> Dear all,
> 
>   With commit r134539, the CodeEmitter backend of TableGen will not generate case for
> pseudo instruction.  It seems that r134539 assumed that the pseudo instruction will
> be lowered before calling CodeEmitter::getBinaryCodeForInstr.  Thus, getBinaryCodeForInstr
> will report a fatal error if it gets a pseudo instruction.
> 
>   However, ARMCodeEmitter does not lower the pseudo instruction before calling
> getBinaryCodeForInstr, and ARMCodeEmitter will no longer work after r134539.
> With this patch, we will generate case for pseudo instruction for CodeEmitter (but not
> MCCodeEmitter) just like what was done before.
> 
>   Please review.  Thanks!
> 
> Sincerely,
> Logan
> <0001-Fix-ARMCodeEmitter-pseudo-instruction-encoder.patch>_______________________________________________
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