[llvm-commits] [llvm] r135726 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

[Bruno Cardoso Lopes]

Author: bruno
Date: Thu Jul 21 19:14:56 2011
New Revision: 135726

URL: http://llvm.org/viewvc/llvm-project?rev=135726&view=rev
Log:
Introduce a new function to lower 256-bit vectors which are not
direclty supported and should be promoted and handled by smaller
shuffles

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=135726&r1=135725&r2=135726&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Jul 21 19:14:56 2011
@@ -5376,6 +5376,13 @@
                                              OpVT, SrcOp)));
 }
 
+/// LowerVECTOR_SHUFFLE_256 - Handle all 256-bit wide vectors shuffles
+/// which could not be matched by any known target speficic shuffle
+static SDValue
+LowerVECTOR_SHUFFLE_256(ShuffleVectorSDNode *SVOp, SelectionDAG &DAG) {
+  return SDValue();
+}
+
 /// LowerVECTOR_SHUFFLE_128v4 - Handle all 128-bit wide vectors with
 /// 4 elements, and match them with several different shuffle types.
 static SDValue
@@ -6101,6 +6108,9 @@
   if (NumElems == 4 && VT.getSizeInBits() == 128)
     return LowerVECTOR_SHUFFLE_128v4(SVOp, DAG);
 
+  //===--------------------------------------------------------------------===//
+  //  Custom lower or generate target specific nodes for 256-bit shuffles.
+
   // Handle VPERMIL permutations
   if (isVPERMILMask(M, VT)) {
     unsigned TargetMask = getShuffleVPERMILImmediate(SVOp);
@@ -6108,6 +6118,10 @@
       return getTargetShuffleNode(X86ISD::VPERMIL, dl, VT, V1, TargetMask, DAG);
   }
 
+  // Handle general 256-bit shuffles
+  if (VT.is256BitVector())
+    return LowerVECTOR_SHUFFLE_256(SVOp, DAG);
+
   return SDValue();
 }