[llvm-commits] [llvm] r135464 - /llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp

[Akira Hatanaka]

Author: ahatanak
Date: Mon Jul 18 22:14:58 2011
New Revision: 135464

URL: http://llvm.org/viewvc/llvm-project?rev=135464&view=rev
Log:
Do not insert instructions in reverse order.


Modified:
    llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp

Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=135464&r1=135463&r2=135464&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Mon Jul 18 22:14:58 2011
@@ -917,15 +917,16 @@
   //    sra     dest,tmp12,24
   BB = exitMBB;
   int64_t ShiftImm = (Size == 1) ? 24 : 16;
-  // reverse order
-  BuildMI(*BB, BB->begin(), dl, TII->get(Mips::SRA), Dest)
-      .addReg(Tmp12).addImm(ShiftImm);
-  BuildMI(*BB, BB->begin(), dl, TII->get(Mips::SLL), Tmp12)
-      .addReg(Tmp11).addImm(ShiftImm);
-  BuildMI(*BB, BB->begin(), dl, TII->get(Mips::SRL), Tmp11)
-      .addReg(Tmp10).addReg(Shift);
-  BuildMI(*BB, BB->begin(), dl, TII->get(Mips::AND), Tmp10)
+
+  MachineBasicBlock::iterator II = BB->begin();
+  BuildMI(*BB, II, dl, TII->get(Mips::AND), Tmp10)
     .addReg(Oldval).addReg(Mask);
+  BuildMI(*BB, II, dl, TII->get(Mips::SRL), Tmp11)
+      .addReg(Tmp10).addReg(Shift);
+  BuildMI(*BB, II, dl, TII->get(Mips::SLL), Tmp12)
+      .addReg(Tmp11).addImm(ShiftImm);
+  BuildMI(*BB, II, dl, TII->get(Mips::SRA), Dest)
+      .addReg(Tmp12).addImm(ShiftImm);
 
   MI->eraseFromParent();   // The instruction is gone now.
 
@@ -1114,13 +1115,14 @@
   //    sra     dest,tmp9,24
   BB = exitMBB;
   int64_t ShiftImm = (Size == 1) ? 24 : 16;
-  // reverse order
-  BuildMI(*BB, BB->begin(), dl, TII->get(Mips::SRA), Dest)
-      .addReg(Tmp9).addImm(ShiftImm);
-  BuildMI(*BB, BB->begin(), dl, TII->get(Mips::SLL), Tmp9)
-      .addReg(Tmp8).addImm(ShiftImm);
-  BuildMI(*BB, BB->begin(), dl, TII->get(Mips::SRL), Tmp8)
+
+  MachineBasicBlock::iterator II = BB->begin();
+  BuildMI(*BB, II, dl, TII->get(Mips::SRL), Tmp8)
       .addReg(Oldval4).addReg(Shift);
+  BuildMI(*BB, II, dl, TII->get(Mips::SLL), Tmp9)
+      .addReg(Tmp8).addImm(ShiftImm);
+  BuildMI(*BB, II, dl, TII->get(Mips::SRA), Dest)
+      .addReg(Tmp9).addImm(ShiftImm);
 
   MI->eraseFromParent();   // The instruction is gone now.