[llvm-commits] [llvm] r135123 - /llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

[Chris Lattner]

On Jul 13, 2011, at 6:12 PM, Eric Christopher wrote:

> Author: echristo
> Date: Wed Jul 13 20:12:15 2011
> New Revision: 135123
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=135123&view=rev
> Log:
> Add a dag combine pattern for folding C2-(A+C1) -> (C2-C1)-A
> 
> Fixes rdar://9761830

Testcase please,

-Chris

> 
> Modified:
>    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
> 
> Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=135123&r1=135122&r2=135123&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
> +++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Wed Jul 13 20:12:15 2011
> @@ -1001,7 +1001,7 @@
>           dbgs() << "\nWith: ";
>           RV.getNode()->dump(&DAG);
>           dbgs() << '\n');
> -    
> +
>     // Transfer debug value.
>     DAG.TransferDbgValues(SDValue(N, 0), RV);
>     WorkListRemover DeadNodes(*this);
> @@ -1566,6 +1566,8 @@
>   SDValue N1 = N->getOperand(1);
>   ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0.getNode());
>   ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
> +  ConstantSDNode *N1C1 = N1.getOpcode() != ISD::ADD ? 0 :
> +    dyn_cast<ConstantSDNode>(N1.getOperand(1).getNode());
>   EVT VT = N0.getValueType();
> 
>   // fold vector ops
> @@ -1597,6 +1599,12 @@
>   // fold (A+B)-B -> A
>   if (N0.getOpcode() == ISD::ADD && N0.getOperand(1) == N1)
>     return N0.getOperand(0);
> +  // fold C2-(A+C1) -> (C2-C1)-A
> +  if (N1.getOpcode() == ISD::ADD && N0C && N1C1) {
> +    SDValue NewC = DAG.getConstant((N0C->getAPIntValue() - N1C1->getAPIntValue()), VT);
> +    return DAG.getNode(ISD::SUB, N->getDebugLoc(), VT, NewC,
> +		       N1.getOperand(0));
> +  }
>   // fold ((A+(B+or-C))-B) -> A+or-C
>   if (N0.getOpcode() == ISD::ADD &&
>       (N0.getOperand(1).getOpcode() == ISD::SUB ||
> @@ -2571,7 +2579,7 @@
>       (!LookPassAnd0 || !LookPassAnd1) &&
>       !DAG.MaskedValueIsZero(N10, APInt::getHighBitsSet(OpSizeInBits, 16)))
>     return SDValue();
> -  
> +
>   SDValue Res = DAG.getNode(ISD::BSWAP, N->getDebugLoc(), VT, N00);
>   if (OpSizeInBits > 16)
>     Res = DAG.getNode(ISD::SRL, N->getDebugLoc(), VT, Res,
> 
> 
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