[llvm-commits] [llvm] r135082 - in /llvm/trunk/lib/Target/ARM: ARMInstrFormats.td ARMInstrThumb2.td
Jim Grosbach
grosbach at apple.com
Wed Jul 13 14:17:59 PDT 2011
Author: grosbach
Date: Wed Jul 13 16:17:59 2011
New Revision: 135082
URL: http://llvm.org/viewvc/llvm-project?rev=135082&view=rev
Log:
Parameterize away the ARM T1Cop class.
Modified:
llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td
Modified: llvm/trunk/lib/Target/ARM/ARMInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrFormats.td?rev=135082&r1=135081&r2=135082&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrFormats.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrFormats.td Wed Jul 13 16:17:59 2011
@@ -1173,14 +1173,9 @@
: Thumb2XI<oops, iops, AddrModeNone, SizeSpecial, itin, asm, "", pattern>;
// Move to/from coprocessor instructions
-class T1Cop<dag oops, dag iops, string asm, list<dag> pattern>
+class T2Cop<bits<4> opc, dag oops, dag iops, string asm, list<dag> pattern>
: T2XI <oops, iops, NoItinerary, asm, pattern>, Requires<[IsThumb2]> {
- let Inst{31-28} = 0b1110;
-}
-
-class T2Cop<dag oops, dag iops, string asm, list<dag> pattern>
- : T2XI<oops, iops, NoItinerary, asm, pattern>, Requires<[IsThumb2]> {
- let Inst{31-28} = 0b1111;
+ let Inst{31-28} = opc;
}
// Two-address instructions
Modified: llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td?rev=135082&r1=135081&r2=135082&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrThumb2.td Wed Jul 13 16:17:59 2011
@@ -3331,7 +3331,8 @@
class tMovRCopro<string opc, bit direction, dag oops, dag iops,
list<dag> pattern>
- : T1Cop<oops, iops, !strconcat(opc, "\t$cop, $opc1, $Rt, $CRn, $CRm, $opc2"),
+ : T2Cop<0b1110, oops, iops,
+ !strconcat(opc, "\t$cop, $opc1, $Rt, $CRn, $CRm, $opc2"),
pattern> {
let Inst{27-24} = 0b1110;
let Inst{20} = direction;
@@ -3369,7 +3370,8 @@
class tMovRRCopro<string opc, bit direction,
list<dag> pattern = [/* For disassembly only */]>
- : T1Cop<(outs), (ins p_imm:$cop, i32imm:$opc1, GPR:$Rt, GPR:$Rt2, c_imm:$CRm),
+ : T2Cop<0b1110, (outs),
+ (ins p_imm:$cop, i32imm:$opc1, GPR:$Rt, GPR:$Rt2, c_imm:$CRm),
!strconcat(opc, "\t$cop, $opc1, $Rt, $Rt2, $CRm"), pattern> {
let Inst{27-24} = 0b1100;
let Inst{23-21} = 0b010;
@@ -3395,7 +3397,8 @@
class t2MovRCopro<string opc, bit direction, dag oops, dag iops,
list<dag> pattern>
- : T2Cop<oops, iops, !strconcat(opc, "\t$cop, $opc1, $Rt, $CRn, $CRm, $opc2"),
+ : T2Cop<0b1111, oops, iops,
+ !strconcat(opc, "\t$cop, $opc1, $Rt, $CRn, $CRm, $opc2"),
pattern> {
let Inst{27-24} = 0b1110;
let Inst{20} = direction;
@@ -3431,7 +3434,8 @@
class t2MovRRCopro<string opc, bit direction,
list<dag> pattern = [/* For disassembly only */]>
- : T2Cop<(outs), (ins p_imm:$cop, i32imm:$opc1, GPR:$Rt, GPR:$Rt2, c_imm:$CRm),
+ : T2Cop<0b1111, (outs),
+ (ins p_imm:$cop, i32imm:$opc1, GPR:$Rt, GPR:$Rt2, c_imm:$CRm),
!strconcat(opc, "\t$cop, $opc1, $Rt, $Rt2, $CRm"), pattern> {
let Inst{27-24} = 0b1100;
let Inst{23-21} = 0b010;
@@ -3461,7 +3465,7 @@
// Other Coprocessor Instructions.
//
-def tCDP : T1Cop<(outs), (ins p_imm:$cop, i32imm:$opc1,
+def tCDP : T2Cop<0b1110, (outs), (ins p_imm:$cop, i32imm:$opc1,
c_imm:$CRd, c_imm:$CRn, c_imm:$CRm, i32imm:$opc2),
"cdp\t$cop, $opc1, $CRd, $CRn, $CRm, $opc2",
[(int_arm_cdp imm:$cop, imm:$opc1, imm:$CRd, imm:$CRn,
@@ -3484,7 +3488,7 @@
let Inst{23-20} = opc1;
}
-def t2CDP2 : T2Cop<(outs), (ins p_imm:$cop, i32imm:$opc1,
+def t2CDP2 : T2Cop<0b1111, (outs), (ins p_imm:$cop, i32imm:$opc1,
c_imm:$CRd, c_imm:$CRn, c_imm:$CRm, i32imm:$opc2),
"cdp2\t$cop, $opc1, $CRd, $CRn, $CRm, $opc2",
[(int_arm_cdp2 imm:$cop, imm:$opc1, imm:$CRd, imm:$CRn,
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