[llvm-commits] [PATCH] Enable use of SPARC g2-g4 global registers

[Martin Whitaker]

Jakob Stoklund Olesen wrote:
>
> On Jul 11, 2011, at 2:59 PM, Martin Whitaker wrote:
>
>> OK, revised patch attached, with
>>
>>> +; CHECK_N: ld [%i0], %i{{[1-3]}}
>>> +; CHECK_N: ld [%i0], %i{{[1-3]}}
>>> +; CHECK_N: ld [%i0], %i{{[1-3]}}
>>> +; CHECK_Y: ld [%i0], %g{{[2-4]}}
>>> +; CHECK_Y: ld [%i0], %g{{[2-4]}}
>>> +; CHECK_Y: ld [%i0], %g{{[2-4]}}
>>
>> This makes the test independent of the exact order that the registers are allocated, although it does still require that the registers are allocated using the preferred order. I hope the register allocator does observe the preferred order, otherwise we won't be able to do a good job of optimising leaf functions on the SPARC.
>
> The register allocator follows the preferred order as long as it doesn't need to use all the available registers, so I think your patch is fine.
>
> In the not so distant future, it will treat all volatile registers as 'free', i.e. it may allocate more volatile registers than is strictly needed.
>
> Should G2-G4 be treated as callee-saved registers?
>
In my experience, no. You gain much more by having them as additional volatile 
registers.

Martin