[llvm-commits] [PATCH] Enable use of SPARC g2-g4 global registers

[Martin Whitaker]

Jakob Stoklund Olesen wrote:
>
> On Jul 11, 2011, at 2:05 PM, Martin Whitaker wrote:
>
>> Jakob Stoklund Olesen wrote:
>>>
[...]
>>> There register stuff looks good to me, but someone who is familiar with SPARC should comment.
>>>
>>> +define void @test(i32* %ptr) nounwind {
>>> +entry:
>>> +; CHECK_N: ld [%i0], %i3
>>> +; CHECK_N: ld [%i0], %i2
>>> +; CHECK_N: ld [%i0], %i1
>>> +; CHECK_Y: ld [%i0], %g4
>>> +; CHECK_Y: ld [%i0], %g3
>>> +; CHECK_Y: ld [%i0], %g2
>>>
>>> Please don't write tests that depend on the exact details of register allocation. There is no reason these registers would be allocated in exactly that order.
>>>
>> This test is checking whether the feature of enabling/disabling use of the global registers g2-g4 is working. I spent some time thinking about this, but can't think of a way to test this that doesn't depend on the exact details of register allocation.
>>
>> Just had a thought - is it possible to use regular expressions in the patterns to be matched?
>
> Yes, and you can use CHECK-NOT. See the man-page for FileCheck/
>
OK, revised patch attached, with

 > +; CHECK_N: ld [%i0], %i{{[1-3]}}
 > +; CHECK_N: ld [%i0], %i{{[1-3]}}
 > +; CHECK_N: ld [%i0], %i{{[1-3]}}
 > +; CHECK_Y: ld [%i0], %g{{[2-4]}}
 > +; CHECK_Y: ld [%i0], %g{{[2-4]}}
 > +; CHECK_Y: ld [%i0], %g{{[2-4]}}

This makes the test independent of the exact order that the registers are 
allocated, although it does still require that the registers are allocated 
using the preferred order. I hope the register allocator does observe the 
preferred order, otherwise we won't be able to do a good job of optimising 
leaf functions on the SPARC.

Martin
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