[llvm-commits] [llvm] r134608 - in /llvm/trunk/lib/Target/ARM: ARM.td ARMSubtarget.cpp MCTargetDesc/ARMMCTargetDesc.cpp MCTargetDesc/ARMMCTargetDesc.h
Evan Cheng
evan.cheng at apple.com
Thu Jul 7 09:22:35 PDT 2011
Doug's 134614 should have fixed this. Sorry about the breakage.
Evan
On Jul 7, 2011, at 4:18 AM, James Molloy <james.molloy at arm.com> wrote:
> Hi Evan,
>
> This (or one of the very closely committed diffs) has broken ARM builds. For
> some reason the buildbot passed, but our internal builds (and a manual
> checkout just to be sure) all fail with a link error:
>
> Linking CXX executable ../../bin/llc
> ../../lib/libLLVMARMCodeGen.a(ARMSubtarget.cpp.o): In function
> `llvm::ARMSubtarget::ARMSubtarget(std::basic_string<char,
> std::char_traits<char>, std::allocator<char> > const&,
> std::basic_string<char, std::char_traits<char>, std::allocator<char> >
> const&, std::basic_string<char, std::char_traits<char>, std::allocator<char>
>> const&)':
> ARMSubtarget.cpp:(.text+0x82c): undefined reference to
> `llvm::ARM_MC::ParseARMTriple(llvm::StringRef)'
> ../../lib/libLLVMARMCodeGen.a(ARMSubtarget.cpp.o): In function
> `llvm::ARMSubtarget::ARMSubtarget(std::basic_string<char,
> std::char_traits<char>, std::allocator<char> > const&,
> std::basic_string<char, std::char_traits<char>, std::allocator<char> >
> const&, std::basic_string<char, std::char_traits<char>, std::allocator<char>
>> const&)':
> ARMSubtarget.cpp:(.text+0xf10): undefined reference to
> `llvm::ARM_MC::ParseARMTriple(llvm::StringRef)'
> collect2: ld returned 1 exit status
>
> Cheers,
>
> James
>
>> -----Original Message-----
>> From: llvm-commits-bounces at cs.uiuc.edu [mailto:llvm-commits-
>> bounces at cs.uiuc.edu] On Behalf Of Evan Cheng
>> Sent: 07 July 2011 09:27
>> To: llvm-commits at cs.uiuc.edu
>> Subject: [llvm-commits] [llvm] r134608 - in /llvm/trunk/lib/Target/ARM:
>> ARM.td ARMSubtarget.cpp MCTargetDesc/ARMMCTargetDesc.cpp
>> MCTargetDesc/ARMMCTargetDesc.h
>>
>> Author: evancheng
>> Date: Thu Jul 7 03:26:46 2011
>> New Revision: 134608
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=134608&view=rev
>> Log:
>> Sink feature IsThumb into MC layer.
>>
>> Modified:
>> llvm/trunk/lib/Target/ARM/ARM.td
>> llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp
>> llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
>> llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.h
>>
>> Modified: llvm/trunk/lib/Target/ARM/ARM.td
>> URL: http://llvm.org/viewvc/llvm-
>> project/llvm/trunk/lib/Target/ARM/ARM.td?rev=134608&r1=134607&r2=134608
>> &view=diff
>> =======================================================================
>> =======
>> --- llvm/trunk/lib/Target/ARM/ARM.td (original)
>> +++ llvm/trunk/lib/Target/ARM/ARM.td Thu Jul 7 03:26:46 2011
>> @@ -16,6 +16,12 @@
>>
>> include "llvm/Target/Target.td"
>>
>> +//===-----------------------------------------------------------------
>> -----===//
>> +// ARM Subtarget state.
>> +//
>> +
>> +def ModeThumb : SubtargetFeature<"thumb", "IsThumb", "true",
>> + "Thumb mode">;
>>
>> //===-----------------------------------------------------------------
>> -----===//
>> // ARM Subtarget features.
>> @@ -85,23 +91,23 @@
>> def FeatureMP : SubtargetFeature<"mp", "HasMPExtension", "true",
>> "Supports Multiprocessing
>> extension">;
>>
>> -// ARM architectures.
>> +// ARM ISAs.
>> def HasV4TOps : SubtargetFeature<"v4t", "HasV4TOps", "true",
>> - "ARM v4T">;
>> + "Support ARM v4T instructions">;
>> def HasV5TOps : SubtargetFeature<"v5t", "HasV5TOps", "true",
>> - "ARM v5T",
>> + "Support ARM v5T instructions",
>> [HasV4TOps]>;
>> def HasV5TEOps : SubtargetFeature<"v5te", "HasV5TEOps", "true",
>> - "ARM v5TE, v5TEj, v5TExp",
>> + "Support ARM v5TE, v5TEj, and v5TExp
>> instructions",
>> [HasV5TOps]>;
>> def HasV6Ops : SubtargetFeature<"v6", "HasV6Ops", "true",
>> - "ARM v6",
>> + "Support ARM v6 instructions",
>> [HasV5TEOps]>;
>> def HasV6T2Ops : SubtargetFeature<"v6t2", "HasV6T2Ops", "true",
>> - "ARM v6t2",
>> + "Support ARM v6t2 instructions",
>> [HasV6Ops, FeatureThumb2,
>> FeatureDSPThumb2]>;
>> def HasV7Ops : SubtargetFeature<"v7", "HasV7Ops", "true",
>> - "ARM v7",
>> + "Support ARM v7 instructions",
>> [HasV6T2Ops]>;
>>
>> //===-----------------------------------------------------------------
>> -----===//
>> @@ -111,8 +117,6 @@
>> include "ARMSchedule.td"
>>
>> // ARM processor families.
>> -def ProcOthers : SubtargetFeature<"others", "ARMProcFamily",
>> "Others",
>> - "One of the other ARM processor
>> families">;
>> def ProcA8 : SubtargetFeature<"a8", "ARMProcFamily", "CortexA8",
>> "Cortex-A8 ARM processors",
>> [FeatureSlowFPBrcc,
>> FeatureNEONForFP,
>>
>> Modified: llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp
>> URL: http://llvm.org/viewvc/llvm-
>> project/llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp?rev=134608&r1=134607
>> &r2=134608&view=diff
>> =======================================================================
>> =======
>> --- llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp (original)
>> +++ llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp Thu Jul 7 03:26:46 2011
>> @@ -81,14 +81,13 @@
>> // Insert the architecture feature derived from the target triple
>> into the
>> // feature string. This is important for setting features that are
>> implied
>> // based on the architecture version.
>> - std::string ArchFS = ARM_MC::ParseARMTriple(TT, IsThumb);
>> + std::string ArchFS = ARM_MC::ParseARMTriple(TT);
>> if (!FS.empty()) {
>> if (!ArchFS.empty())
>> ArchFS = ArchFS + "," + FS;
>> else
>> ArchFS = FS;
>> }
>> -
>> ParseSubtargetFeatures(CPUString, ArchFS);
>>
>> // Thumb2 implies at least V6T2. FIXME: Fix tests to explicitly
>> specify a
>>
>> Modified: llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
>> URL: http://llvm.org/viewvc/llvm-
>> project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp?rev=
>> 134608&r1=134607&r2=134608&view=diff
>> =======================================================================
>> =======
>> --- llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
>> (original)
>> +++ llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp Thu Jul
>> 7 03:26:46 2011
>> @@ -42,8 +42,16 @@
>>
>> MCSubtargetInfo *createARMMCSubtargetInfo(StringRef TT, StringRef CPU,
>> StringRef FS) {
>> + std::string ArchFS = ARM_MC::ParseARMTriple(TT);
>> + if (!FS.empty()) {
>> + if (!ArchFS.empty())
>> + ArchFS = ArchFS + "," + FS.str();
>> + else
>> + ArchFS = FS;
>> + }
>> +
>> MCSubtargetInfo *X = new MCSubtargetInfo();
>> - InitARMMCSubtargetInfo(X, CPU, FS);
>> + InitARMMCSubtargetInfo(X, CPU, ArchFS);
>> return X;
>> }
>>
>> @@ -74,16 +82,17 @@
>> createARMMCSubtargetInfo);
>> }
>>
>> -std::string ARM_MC::ParseARMTriple(StringRef TT, bool &IsThumb) {
>> +std::string ARM_MC::ParseARMTriple(StringRef TT) {
>> // Set the boolean corresponding to the current target triple, or
>> the default
>> // if one cannot be determined, to true.
>> unsigned Len = TT.size();
>> unsigned Idx = 0;
>>
>> + bool isThumb = false;
>> if (Len >= 5 && TT.substr(0, 4) == "armv")
>> Idx = 4;
>> else if (Len >= 6 && TT.substr(0, 5) == "thumb") {
>> - IsThumb = true;
>> + isThumb = true;
>> if (Len >= 7 && TT[5] == 'v')
>> Idx = 6;
>> }
>> @@ -116,5 +125,12 @@
>> ARMArchFeature = "+v4t";
>> }
>>
>> + if (isThumb) {
>> + if (ARMArchFeature.empty())
>> + ARMArchFeature = "+thumb";
>> + else
>> + ARMArchFeature += ",+thumb";
>> + }
>> +
>> return ARMArchFeature;
>> }
>>
>> Modified: llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.h
>> URL: http://llvm.org/viewvc/llvm-
>> project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.h?rev=13
>> 4608&r1=134607&r2=134608&view=diff
>> =======================================================================
>> =======
>> --- llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.h (original)
>> +++ llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.h Thu Jul 7
>> 03:26:46 2011
>> @@ -23,7 +23,7 @@
>> extern Target TheARMTarget, TheThumbTarget;
>>
>> namespace ARM_MC {
>> - std::string ParseARMTriple(StringRef TT, bool &IsThumb);
>> + std::string ParseARMTriple(StringRef TT);
>> }
>>
>> } // End llvm namespace
>>
>>
>> _______________________________________________
>> llvm-commits mailing list
>> llvm-commits at cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
>
>
>
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