[llvm-commits] [llvm] r134606 - in /llvm/trunk: include/llvm/MC/ include/llvm/Target/ lib/MC/ lib/Target/ARM/ lib/Target/ARM/MCTargetDesc/ lib/Target/Alpha/ lib/Target/Blackfin/ lib/Target/CellSPU/ lib/Target/MBlaze/ lib/Target/MSP430/ lib/Target/Mips/ lib/Target/PTX/ lib/Target/PowerPC/ lib/Target/Sparc/ lib/Target/SystemZ/ lib/Target/X86/ lib/Target/X86/MCTargetDesc/ lib/Target/XCore/ utils/TableGen/
Evan Cheng
evan.cheng at apple.com
Thu Jul 7 00:07:08 PDT 2011
Author: evancheng
Date: Thu Jul 7 02:07:08 2011
New Revision: 134606
URL: http://llvm.org/viewvc/llvm-project?rev=134606&view=rev
Log:
Compute feature bits at time of MCSubtargetInfo initialization.
Modified:
llvm/trunk/include/llvm/MC/MCSubtargetInfo.h
llvm/trunk/include/llvm/Target/TargetRegistry.h
llvm/trunk/lib/MC/MCSubtargetInfo.cpp
llvm/trunk/lib/MC/SubtargetFeature.cpp
llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp
llvm/trunk/lib/Target/ARM/ARMSubtarget.h
llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
llvm/trunk/lib/Target/Alpha/AlphaSubtarget.cpp
llvm/trunk/lib/Target/Alpha/AlphaSubtarget.h
llvm/trunk/lib/Target/Blackfin/BlackfinSubtarget.cpp
llvm/trunk/lib/Target/Blackfin/BlackfinSubtarget.h
llvm/trunk/lib/Target/CellSPU/SPUSubtarget.cpp
llvm/trunk/lib/Target/CellSPU/SPUSubtarget.h
llvm/trunk/lib/Target/MBlaze/MBlazeSubtarget.cpp
llvm/trunk/lib/Target/MBlaze/MBlazeSubtarget.h
llvm/trunk/lib/Target/MSP430/MSP430Subtarget.cpp
llvm/trunk/lib/Target/MSP430/MSP430Subtarget.h
llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp
llvm/trunk/lib/Target/Mips/MipsSubtarget.h
llvm/trunk/lib/Target/PTX/PTXSubtarget.cpp
llvm/trunk/lib/Target/PTX/PTXSubtarget.h
llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp
llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h
llvm/trunk/lib/Target/Sparc/SparcSubtarget.cpp
llvm/trunk/lib/Target/Sparc/SparcSubtarget.h
llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.cpp
llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.h
llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
llvm/trunk/lib/Target/X86/X86Subtarget.cpp
llvm/trunk/lib/Target/X86/X86Subtarget.h
llvm/trunk/lib/Target/XCore/XCoreSubtarget.cpp
llvm/trunk/lib/Target/XCore/XCoreSubtarget.h
llvm/trunk/utils/TableGen/SubtargetEmitter.cpp
Modified: llvm/trunk/include/llvm/MC/MCSubtargetInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCSubtargetInfo.h?rev=134606&r1=134605&r2=134606&view=diff
==============================================================================
--- llvm/trunk/include/llvm/MC/MCSubtargetInfo.h (original)
+++ llvm/trunk/include/llvm/MC/MCSubtargetInfo.h Thu Jul 7 02:07:08 2011
@@ -34,30 +34,29 @@
const unsigned *ForwardingPathes; // Forwarding pathes
unsigned NumFeatures; // Number of processor features
unsigned NumProcs; // Number of processors
-
+ unsigned FeatureBits; // Feature bits for current CPU
+
public:
- void InitMCSubtargetInfo(const SubtargetFeatureKV *PF,
+ void InitMCSubtargetInfo(StringRef CPU, StringRef FS,
+ const SubtargetFeatureKV *PF,
const SubtargetFeatureKV *PD,
const SubtargetInfoKV *PI, const InstrStage *IS,
const unsigned *OC, const unsigned *FP,
- unsigned NF, unsigned NP) {
- ProcFeatures = PF;
- ProcDesc = PD;
- ProcItins = PI;
- Stages = IS;
- OperandCycles = OC;
- ForwardingPathes = FP;
- NumFeatures = NF;
- NumProcs = NP;
+ unsigned NF, unsigned NP);
+
+ /// getFeatureBits - Get the feature bits.
+ ///
+ uint64_t getFeatureBits() const {
+ return FeatureBits;
}
+ /// ReInitMCSubtargetInfo - Change CPU (and optionally supplemented with
+ /// feature string), recompute and return feature bits.
+ uint64_t ReInitMCSubtargetInfo(StringRef CPU, StringRef FS);
+
/// getInstrItineraryForCPU - Get scheduling itinerary of a CPU.
///
InstrItineraryData getInstrItineraryForCPU(StringRef CPU) const;
-
- /// getFeatureBits - Get the feature bits for a CPU (optionally supplemented
- /// with feature string).
- uint64_t getFeatureBits(StringRef CPU, StringRef FS) const;
};
} // End llvm namespace
Modified: llvm/trunk/include/llvm/Target/TargetRegistry.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetRegistry.h?rev=134606&r1=134605&r2=134606&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetRegistry.h (original)
+++ llvm/trunk/include/llvm/Target/TargetRegistry.h Thu Jul 7 02:07:08 2011
@@ -70,7 +70,9 @@
StringRef TT);
typedef MCInstrInfo *(*MCInstrInfoCtorFnTy)(void);
typedef MCRegisterInfo *(*MCRegInfoCtorFnTy)(void);
- typedef MCSubtargetInfo *(*MCSubtargetInfoCtorFnTy)(void);
+ typedef MCSubtargetInfo *(*MCSubtargetInfoCtorFnTy)(StringRef TT,
+ StringRef CPU,
+ StringRef Features);
typedef TargetMachine *(*TargetMachineCtorTy)(const Target &T,
const std::string &TT,
const std::string &CPU,
@@ -269,10 +271,18 @@
/// createMCSubtargetInfo - Create a MCSubtargetInfo implementation.
///
- MCSubtargetInfo *createMCSubtargetInfo() const {
+ /// \arg Triple - This argument is used to determine the target machine
+ /// feature set; it should always be provided. Generally this should be
+ /// either the target triple from the module, or the target triple of the
+ /// host if that does not exist.
+ /// \arg CPU - This specifies the name of the target CPU.
+ /// \arg Features - This specifies the string representation of the
+ /// additional target features.
+ MCSubtargetInfo *createMCSubtargetInfo(StringRef Triple, StringRef CPU,
+ StringRef Features) const {
if (!MCSubtargetInfoCtorFn)
return 0;
- return MCSubtargetInfoCtorFn();
+ return MCSubtargetInfoCtorFn(Triple, CPU, Features);
}
/// createTargetMachine - Create a target specific machine implementation
@@ -824,7 +834,8 @@
TargetRegistry::RegisterMCSubtargetInfo(T, &Allocator);
}
private:
- static MCSubtargetInfo *Allocator() {
+ static MCSubtargetInfo *Allocator(StringRef TT, StringRef CPU,
+ StringRef FS) {
return new MCSubtargetInfoImpl();
}
};
Modified: llvm/trunk/lib/MC/MCSubtargetInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCSubtargetInfo.cpp?rev=134606&r1=134605&r2=134606&view=diff
==============================================================================
--- llvm/trunk/lib/MC/MCSubtargetInfo.cpp (original)
+++ llvm/trunk/lib/MC/MCSubtargetInfo.cpp Thu Jul 7 02:07:08 2011
@@ -16,6 +16,38 @@
using namespace llvm;
+void MCSubtargetInfo::InitMCSubtargetInfo(StringRef CPU, StringRef FS,
+ const SubtargetFeatureKV *PF,
+ const SubtargetFeatureKV *PD,
+ const SubtargetInfoKV *PI,
+ const InstrStage *IS,
+ const unsigned *OC,
+ const unsigned *FP,
+ unsigned NF, unsigned NP) {
+ ProcFeatures = PF;
+ ProcDesc = PD;
+ ProcItins = PI;
+ Stages = IS;
+ OperandCycles = OC;
+ ForwardingPathes = FP;
+ NumFeatures = NF;
+ NumProcs = NP;
+
+ SubtargetFeatures Features(FS);
+ FeatureBits = Features.getFeatureBits(CPU, ProcDesc, NumProcs,
+ ProcFeatures, NumFeatures);
+}
+
+
+/// ReInitMCSubtargetInfo - Change CPU (and optionally supplemented with
+/// feature string) and recompute feature bits.
+uint64_t MCSubtargetInfo::ReInitMCSubtargetInfo(StringRef CPU, StringRef FS) {
+ SubtargetFeatures Features(FS);
+ FeatureBits = Features.getFeatureBits(CPU, ProcDesc, NumProcs,
+ ProcFeatures, NumFeatures);
+ return FeatureBits;
+}
+
InstrItineraryData
MCSubtargetInfo::getInstrItineraryForCPU(StringRef CPU) const {
assert(ProcItins && "Instruction itineraries information not available!");
@@ -42,11 +74,3 @@
return InstrItineraryData(Stages, OperandCycles, ForwardingPathes,
(InstrItinerary *)Found->Value);
}
-
-/// getFeatureBits - Get the feature bits for a CPU (optionally supplemented
-/// with feature string).
-uint64_t MCSubtargetInfo::getFeatureBits(StringRef CPU, StringRef FS) const {
- SubtargetFeatures Features(FS);
- return Features.getFeatureBits(CPU, ProcDesc, NumProcs,
- ProcFeatures, NumFeatures);
-}
Modified: llvm/trunk/lib/MC/SubtargetFeature.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/SubtargetFeature.cpp?rev=134606&r1=134605&r2=134606&view=diff
==============================================================================
--- llvm/trunk/lib/MC/SubtargetFeature.cpp (original)
+++ llvm/trunk/lib/MC/SubtargetFeature.cpp Thu Jul 7 02:07:08 2011
@@ -231,8 +231,9 @@
size_t CPUTableSize,
const SubtargetFeatureKV *FeatureTable,
size_t FeatureTableSize) {
- assert(CPUTable && "missing CPU table");
- assert(FeatureTable && "missing features table");
+ if (!FeatureTableSize || !CPUTableSize)
+ return 0;
+
#ifndef NDEBUG
for (size_t i = 1; i < CPUTableSize; i++) {
assert(strcmp(CPUTable[i - 1].Key, CPUTable[i].Key) < 0 &&
@@ -249,24 +250,27 @@
if (CPU == "help")
Help(CPUTable, CPUTableSize, FeatureTable, FeatureTableSize);
- // Find CPU entry
- const SubtargetFeatureKV *CPUEntry = Find(CPU, CPUTable, CPUTableSize);
- // If there is a match
- if (CPUEntry) {
- // Set base feature bits
- Bits = CPUEntry->Value;
-
- // Set the feature implied by this CPU feature, if any.
- for (size_t i = 0; i < FeatureTableSize; ++i) {
- const SubtargetFeatureKV &FE = FeatureTable[i];
- if (CPUEntry->Value & FE.Value)
- SetImpliedBits(Bits, &FE, FeatureTable, FeatureTableSize);
+ // Find CPU entry if CPU name is specified.
+ if (!CPU.empty()) {
+ const SubtargetFeatureKV *CPUEntry = Find(CPU, CPUTable, CPUTableSize);
+ // If there is a match
+ if (CPUEntry) {
+ // Set base feature bits
+ Bits = CPUEntry->Value;
+
+ // Set the feature implied by this CPU feature, if any.
+ for (size_t i = 0; i < FeatureTableSize; ++i) {
+ const SubtargetFeatureKV &FE = FeatureTable[i];
+ if (CPUEntry->Value & FE.Value)
+ SetImpliedBits(Bits, &FE, FeatureTable, FeatureTableSize);
+ }
+ } else {
+ errs() << "'" << CPU
+ << "' is not a recognized processor for this target"
+ << " (ignoring processor)\n";
}
- } else {
- errs() << "'" << CPU
- << "' is not a recognized processor for this target"
- << " (ignoring processor)\n";
}
+
// Iterate through each feature
for (size_t i = 0, E = Features.size(); i < E; i++) {
const StringRef Feature = Features[i];
Modified: llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp?rev=134606&r1=134605&r2=134606&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp Thu Jul 7 02:07:08 2011
@@ -38,7 +38,7 @@
ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &CPU,
const std::string &FS)
- : ARMGenSubtargetInfo()
+ : ARMGenSubtargetInfo(TT, CPU, FS)
, ARMProcFamily(Others)
, HasV4TOps(false)
, HasV5TOps(false)
@@ -78,9 +78,6 @@
if (CPUString.empty())
CPUString = "generic";
- if (TT.find("eabi") != std::string::npos)
- TargetABI = ARM_ABI_AAPCS;
-
// Insert the architecture feature derived from the target triple into the
// feature string. This is important for setting features that are implied
// based on the architecture version.
@@ -92,7 +89,7 @@
ArchFS = FS;
}
- ParseSubtargetFeatures(ArchFS, CPUString);
+ ParseSubtargetFeatures(CPUString, ArchFS);
// Thumb2 implies at least V6T2. FIXME: Fix tests to explicitly specify a
// ARM version or CPU and then remove this.
@@ -105,6 +102,9 @@
// After parsing Itineraries, set ItinData.IssueWidth.
computeIssueWidth();
+ if (TT.find("eabi") != std::string::npos)
+ TargetABI = ARM_ABI_AAPCS;
+
if (isAAPCS_ABI())
stackAlignment = 8;
Modified: llvm/trunk/lib/Target/ARM/ARMSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMSubtarget.h?rev=134606&r1=134605&r2=134606&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMSubtarget.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMSubtarget.h Thu Jul 7 02:07:08 2011
@@ -25,6 +25,7 @@
namespace llvm {
class GlobalValue;
+class StringRef;
class ARMSubtarget : public ARMGenSubtargetInfo {
protected:
@@ -168,7 +169,7 @@
}
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
- void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
+ void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
void computeIssueWidth();
Modified: llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp?rev=134606&r1=134605&r2=134606&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp (original)
+++ llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp Thu Jul 7 02:07:08 2011
@@ -40,9 +40,10 @@
return X;
}
-MCSubtargetInfo *createARMMCSubtargetInfo() {
+MCSubtargetInfo *createARMMCSubtargetInfo(StringRef TT, StringRef CPU,
+ StringRef FS) {
MCSubtargetInfo *X = new MCSubtargetInfo();
- InitARMMCSubtargetInfo(X);
+ InitARMMCSubtargetInfo(X, CPU, FS);
return X;
}
Modified: llvm/trunk/lib/Target/Alpha/AlphaSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaSubtarget.cpp?rev=134606&r1=134605&r2=134606&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Alpha/AlphaSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/Alpha/AlphaSubtarget.cpp Thu Jul 7 02:07:08 2011
@@ -23,13 +23,13 @@
AlphaSubtarget::AlphaSubtarget(const std::string &TT, const std::string &CPU,
const std::string &FS)
- : AlphaGenSubtargetInfo(), HasCT(false) {
+ : AlphaGenSubtargetInfo(TT, CPU, FS), HasCT(false) {
std::string CPUName = CPU;
if (CPUName.empty())
CPUName = "generic";
// Parse features string.
- ParseSubtargetFeatures(FS, CPUName);
+ ParseSubtargetFeatures(CPUName, FS);
// Initialize scheduling itinerary for the specified CPU.
InstrItins = getInstrItineraryForCPU(CPUName);
Modified: llvm/trunk/lib/Target/Alpha/AlphaSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaSubtarget.h?rev=134606&r1=134605&r2=134606&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Alpha/AlphaSubtarget.h (original)
+++ llvm/trunk/lib/Target/Alpha/AlphaSubtarget.h Thu Jul 7 02:07:08 2011
@@ -22,6 +22,7 @@
#include "AlphaGenSubtargetInfo.inc"
namespace llvm {
+class StringRe;
class AlphaSubtarget : public AlphaGenSubtargetInfo {
protected:
@@ -39,7 +40,7 @@
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
- void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
+ void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
bool hasCT() const { return HasCT; }
};
Modified: llvm/trunk/lib/Target/Blackfin/BlackfinSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Blackfin/BlackfinSubtarget.cpp?rev=134606&r1=134605&r2=134606&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Blackfin/BlackfinSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/Blackfin/BlackfinSubtarget.cpp Thu Jul 7 02:07:08 2011
@@ -23,7 +23,7 @@
BlackfinSubtarget::BlackfinSubtarget(const std::string &TT,
const std::string &CPU,
const std::string &FS)
- : BlackfinGenSubtargetInfo(), sdram(false),
+ : BlackfinGenSubtargetInfo(TT, CPU, FS), sdram(false),
icplb(false),
wa_mi_shift(false),
wa_csync(false),
@@ -39,5 +39,5 @@
if (CPUName.empty())
CPUName = "generic";
// Parse features string.
- ParseSubtargetFeatures(FS, CPUName);
+ ParseSubtargetFeatures(CPUName, FS);
}
Modified: llvm/trunk/lib/Target/Blackfin/BlackfinSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Blackfin/BlackfinSubtarget.h?rev=134606&r1=134605&r2=134606&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Blackfin/BlackfinSubtarget.h (original)
+++ llvm/trunk/lib/Target/Blackfin/BlackfinSubtarget.h Thu Jul 7 02:07:08 2011
@@ -21,6 +21,7 @@
#include "BlackfinGenSubtargetInfo.inc"
namespace llvm {
+class StringRef;
class BlackfinSubtarget : public BlackfinGenSubtargetInfo {
bool sdram;
@@ -40,8 +41,7 @@
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
- void ParseSubtargetFeatures(const std::string &FS,
- const std::string &CPU);
+ void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
};
} // end namespace llvm
Modified: llvm/trunk/lib/Target/CellSPU/SPUSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUSubtarget.cpp?rev=134606&r1=134605&r2=134606&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CellSPU/SPUSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/CellSPU/SPUSubtarget.cpp Thu Jul 7 02:07:08 2011
@@ -25,7 +25,7 @@
SPUSubtarget::SPUSubtarget(const std::string &TT, const std::string &CPU,
const std::string &FS) :
- SPUGenSubtargetInfo(),
+ SPUGenSubtargetInfo(TT, CPU, FS),
StackAlignment(16),
ProcDirective(SPU::DEFAULT_PROC),
UseLargeMem(false)
@@ -35,7 +35,7 @@
std::string default_cpu("v0");
// Parse features string.
- ParseSubtargetFeatures(FS, default_cpu);
+ ParseSubtargetFeatures(default_cpu, FS);
// Initialize scheduling itinerary for the specified CPU.
InstrItins = getInstrItineraryForCPU(default_cpu);
Modified: llvm/trunk/lib/Target/CellSPU/SPUSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUSubtarget.h?rev=134606&r1=134605&r2=134606&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CellSPU/SPUSubtarget.h (original)
+++ llvm/trunk/lib/Target/CellSPU/SPUSubtarget.h Thu Jul 7 02:07:08 2011
@@ -23,6 +23,7 @@
namespace llvm {
class GlobalValue;
+ class StringRef;
namespace SPU {
enum {
@@ -57,7 +58,7 @@
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
- void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
+ void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
/// SetJITMode - This is called to inform the subtarget info that we are
/// producing code for the JIT.
Modified: llvm/trunk/lib/Target/MBlaze/MBlazeSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeSubtarget.cpp?rev=134606&r1=134605&r2=134606&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeSubtarget.cpp Thu Jul 7 02:07:08 2011
@@ -26,7 +26,7 @@
MBlazeSubtarget::MBlazeSubtarget(const std::string &TT,
const std::string &CPU,
const std::string &FS):
- MBlazeGenSubtargetInfo(),
+ MBlazeGenSubtargetInfo(TT, CPU, FS),
HasBarrel(false), HasDiv(false), HasMul(false), HasPatCmp(false),
HasFPU(false), HasMul64(false), HasSqrt(false)
{
@@ -34,7 +34,7 @@
std::string CPUName = CPU;
if (CPUName.empty())
CPUName = "mblaze";
- ParseSubtargetFeatures(FS, CPUName);
+ ParseSubtargetFeatures(CPUName, FS);
// Only use instruction scheduling if the selected CPU has an instruction
// itinerary (the default CPU is the only one that doesn't).
Modified: llvm/trunk/lib/Target/MBlaze/MBlazeSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeSubtarget.h?rev=134606&r1=134605&r2=134606&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeSubtarget.h (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeSubtarget.h Thu Jul 7 02:07:08 2011
@@ -22,6 +22,7 @@
#include "MBlazeGenSubtargetInfo.inc"
namespace llvm {
+class StringRef;
class MBlazeSubtarget : public MBlazeGenSubtargetInfo {
@@ -46,7 +47,7 @@
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
- void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
+ void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
/// Compute the number of maximum number of issues per cycle for the
/// MBlaze scheduling itineraries.
Modified: llvm/trunk/lib/Target/MSP430/MSP430Subtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430Subtarget.cpp?rev=134606&r1=134605&r2=134606&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MSP430/MSP430Subtarget.cpp (original)
+++ llvm/trunk/lib/Target/MSP430/MSP430Subtarget.cpp Thu Jul 7 02:07:08 2011
@@ -22,10 +22,11 @@
using namespace llvm;
MSP430Subtarget::MSP430Subtarget(const std::string &TT,
- const std::string &CPUIgnored,
- const std::string &FS) {
- std::string CPU = "generic";
+ const std::string &CPU,
+ const std::string &FS) :
+ MSP430GenSubtargetInfo(TT, CPU, FS) {
+ std::string CPUName = "generic";
// Parse features string.
- ParseSubtargetFeatures(FS, CPU);
+ ParseSubtargetFeatures(CPUName, FS);
}
Modified: llvm/trunk/lib/Target/MSP430/MSP430Subtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430Subtarget.h?rev=134606&r1=134605&r2=134606&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MSP430/MSP430Subtarget.h (original)
+++ llvm/trunk/lib/Target/MSP430/MSP430Subtarget.h Thu Jul 7 02:07:08 2011
@@ -22,6 +22,7 @@
#include <string>
namespace llvm {
+class StringRef;
class MSP430Subtarget : public MSP430GenSubtargetInfo {
bool ExtendedInsts;
@@ -34,7 +35,7 @@
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
- void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
+ void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
};
} // End llvm namespace
Modified: llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp?rev=134606&r1=134605&r2=134606&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp Thu Jul 7 02:07:08 2011
@@ -23,7 +23,7 @@
MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU,
const std::string &FS, bool little) :
- MipsGenSubtargetInfo(),
+ MipsGenSubtargetInfo(TT, CPU, FS),
MipsArchVersion(Mips1), MipsABI(O32), IsLittle(little), IsSingleFloat(false),
IsFP64bit(false), IsGP64bit(false), HasVFPU(false), IsLinux(true),
HasSEInReg(false), HasCondMov(false), HasMulDivAdd(false), HasMinMax(false),
@@ -35,7 +35,7 @@
MipsArchVersion = Mips1;
// Parse features string.
- ParseSubtargetFeatures(FS, CPUName);
+ ParseSubtargetFeatures(CPUName, FS);
// Initialize scheduling itinerary for the specified CPU.
InstrItins = getInstrItineraryForCPU(CPUName);
Modified: llvm/trunk/lib/Target/Mips/MipsSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSubtarget.h?rev=134606&r1=134605&r2=134606&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsSubtarget.h (original)
+++ llvm/trunk/lib/Target/Mips/MipsSubtarget.h Thu Jul 7 02:07:08 2011
@@ -22,6 +22,7 @@
#include "MipsGenSubtargetInfo.inc"
namespace llvm {
+class StringRef;
class MipsSubtarget : public MipsGenSubtargetInfo {
@@ -99,7 +100,7 @@
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
- void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
+ void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
bool isMips1() const { return MipsArchVersion == Mips1; }
bool isMips32() const { return MipsArchVersion >= Mips32; }
Modified: llvm/trunk/lib/Target/PTX/PTXSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXSubtarget.cpp?rev=134606&r1=134605&r2=134606&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PTX/PTXSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/PTX/PTXSubtarget.cpp Thu Jul 7 02:07:08 2011
@@ -23,7 +23,7 @@
PTXSubtarget::PTXSubtarget(const std::string &TT, const std::string &CPU,
const std::string &FS, bool is64Bit)
- : PTXGenSubtargetInfo(),
+ : PTXGenSubtargetInfo(TT, CPU, FS),
PTXTarget(PTX_COMPUTE_1_0),
PTXVersion(PTX_VERSION_2_0),
SupportsDouble(false),
@@ -32,7 +32,7 @@
std::string TARGET = CPU;
if (TARGET.empty())
TARGET = "generic";
- ParseSubtargetFeatures(FS, TARGET);
+ ParseSubtargetFeatures(TARGET, FS);
}
std::string PTXSubtarget::getTargetString() const {
Modified: llvm/trunk/lib/Target/PTX/PTXSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXSubtarget.h?rev=134606&r1=134605&r2=134606&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PTX/PTXSubtarget.h (original)
+++ llvm/trunk/lib/Target/PTX/PTXSubtarget.h Thu Jul 7 02:07:08 2011
@@ -20,6 +20,8 @@
#include "PTXGenSubtargetInfo.inc"
namespace llvm {
+class StringRef;
+
class PTXSubtarget : public PTXGenSubtargetInfo {
public:
@@ -112,8 +114,7 @@
(PTXTarget >= PTX_COMPUTE_2_0 && PTXTarget < PTX_LAST_COMPUTE);
}
- void ParseSubtargetFeatures(const std::string &FS,
- const std::string &CPU);
+ void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
}; // class PTXSubtarget
} // namespace llvm
Modified: llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp?rev=134606&r1=134605&r2=134606&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp Thu Jul 7 02:07:08 2011
@@ -64,7 +64,7 @@
PPCSubtarget::PPCSubtarget(const std::string &TT, const std::string &CPU,
const std::string &FS, bool is64Bit)
- : PPCGenSubtargetInfo()
+ : PPCGenSubtargetInfo(TT, CPU, FS)
, StackAlignment(16)
, DarwinDirective(PPC::DIR_NONE)
, IsGigaProcessor(false)
@@ -88,7 +88,7 @@
#endif
// Parse features string.
- ParseSubtargetFeatures(FS, CPUName);
+ ParseSubtargetFeatures(CPUName, FS);
// Initialize scheduling itinerary for the specified CPU.
InstrItins = getInstrItineraryForCPU(CPUName);
Modified: llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h?rev=134606&r1=134605&r2=134606&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h Thu Jul 7 02:07:08 2011
@@ -26,6 +26,7 @@
#undef PPC
namespace llvm {
+class StringRef;
namespace PPC {
// -m directive values.
@@ -80,8 +81,7 @@
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
- void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
-
+ void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
/// SetJITMode - This is called to inform the subtarget info that we are
/// producing code for the JIT.
Modified: llvm/trunk/lib/Target/Sparc/SparcSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcSubtarget.cpp?rev=134606&r1=134605&r2=134606&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/SparcSubtarget.cpp Thu Jul 7 02:07:08 2011
@@ -22,7 +22,7 @@
SparcSubtarget::SparcSubtarget(const std::string &TT, const std::string &CPU,
const std::string &FS, bool is64Bit) :
- SparcGenSubtargetInfo(),
+ SparcGenSubtargetInfo(TT, CPU, FS),
IsV9(false),
V8DeprecatedInsts(false),
IsVIS(false),
@@ -39,5 +39,5 @@
IsV9 = CPUName == "v9";
// Parse features string.
- ParseSubtargetFeatures(FS, CPUName);
+ ParseSubtargetFeatures(CPUName, FS);
}
Modified: llvm/trunk/lib/Target/Sparc/SparcSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcSubtarget.h?rev=134606&r1=134605&r2=134606&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcSubtarget.h (original)
+++ llvm/trunk/lib/Target/Sparc/SparcSubtarget.h Thu Jul 7 02:07:08 2011
@@ -21,6 +21,7 @@
#include "SparcGenSubtargetInfo.inc"
namespace llvm {
+class StringRef;
class SparcSubtarget : public SparcGenSubtargetInfo {
bool IsV9;
@@ -38,7 +39,7 @@
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
- void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
+ void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
bool is64Bit() const { return Is64Bit; }
std::string getDataLayout() const {
Modified: llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.cpp?rev=134606&r1=134605&r2=134606&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.cpp Thu Jul 7 02:07:08 2011
@@ -26,13 +26,13 @@
SystemZSubtarget::SystemZSubtarget(const std::string &TT,
const std::string &CPU,
const std::string &FS):
- SystemZGenSubtargetInfo(), HasZ10Insts(false) {
+ SystemZGenSubtargetInfo(TT, CPU, FS), HasZ10Insts(false) {
std::string CPUName = CPU;
if (CPUName.empty())
CPUName = "z9";
// Parse features string.
- ParseSubtargetFeatures(FS, CPUName);
+ ParseSubtargetFeatures(CPUName, FS);
}
/// True if accessing the GV requires an extra load.
Modified: llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.h?rev=134606&r1=134605&r2=134606&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.h (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.h Thu Jul 7 02:07:08 2011
@@ -22,6 +22,7 @@
namespace llvm {
class GlobalValue;
+class StringRef;
class TargetMachine;
class SystemZSubtarget : public SystemZGenSubtargetInfo {
@@ -35,7 +36,7 @@
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
- void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
+ void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
bool isZ10() const { return HasZ10Insts; }
Modified: llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp?rev=134606&r1=134605&r2=134606&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp (original)
+++ llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp Thu Jul 7 02:07:08 2011
@@ -40,9 +40,10 @@
return X;
}
-MCSubtargetInfo *createX86MCSubtargetInfo() {
+MCSubtargetInfo *createX86MCSubtargetInfo(StringRef TT, StringRef CPU,
+ StringRef FS) {
MCSubtargetInfo *X = new MCSubtargetInfo();
- InitX86MCSubtargetInfo(X);
+ InitX86MCSubtargetInfo(X, CPU, FS);
return X;
}
Modified: llvm/trunk/lib/Target/X86/X86Subtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Subtarget.cpp?rev=134606&r1=134605&r2=134606&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86Subtarget.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86Subtarget.cpp Thu Jul 7 02:07:08 2011
@@ -292,7 +292,7 @@
X86Subtarget::X86Subtarget(const std::string &TT, const std::string &CPU,
const std::string &FS,
bool is64Bit, unsigned StackAlignOverride)
- : X86GenSubtargetInfo()
+ : X86GenSubtargetInfo(TT, CPU, FS)
, PICStyle(PICStyles::None)
, X86SSELevel(NoMMXSSE)
, X863DNowLevel(NoThreeDNow)
@@ -320,7 +320,7 @@
std::string CPUName = CPU;
if (CPUName.empty())
CPUName = sys::getHostCPUName();
- ParseSubtargetFeatures(FS, CPUName);
+ ParseSubtargetFeatures(CPUName, FS);
// All X86-64 CPUs also have SSE2, however user might request no SSE via
// -mattr, so don't force SSELevel here.
if (HasAVX)
Modified: llvm/trunk/lib/Target/X86/X86Subtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Subtarget.h?rev=134606&r1=134605&r2=134606&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86Subtarget.h (original)
+++ llvm/trunk/lib/Target/X86/X86Subtarget.h Thu Jul 7 02:07:08 2011
@@ -24,6 +24,7 @@
namespace llvm {
class GlobalValue;
+class StringRef;
class TargetMachine;
/// PICStyles - The X86 backend supports a number of different styles of PIC.
@@ -135,7 +136,7 @@
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
- void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
+ void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
/// AutoDetectSubtargetFeatures - Auto-detect CPU features using CPUID
/// instruction.
Modified: llvm/trunk/lib/Target/XCore/XCoreSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreSubtarget.cpp?rev=134606&r1=134605&r2=134606&view=diff
==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/XCore/XCoreSubtarget.cpp Thu Jul 7 02:07:08 2011
@@ -23,6 +23,6 @@
XCoreSubtarget::XCoreSubtarget(const std::string &TT,
const std::string &CPU, const std::string &FS)
- : XCoreGenSubtargetInfo()
+ : XCoreGenSubtargetInfo(TT, CPU, FS)
{
}
Modified: llvm/trunk/lib/Target/XCore/XCoreSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreSubtarget.h?rev=134606&r1=134605&r2=134606&view=diff
==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreSubtarget.h (original)
+++ llvm/trunk/lib/Target/XCore/XCoreSubtarget.h Thu Jul 7 02:07:08 2011
@@ -22,6 +22,7 @@
#include "XCoreGenSubtargetInfo.inc"
namespace llvm {
+class StringRef;
class XCoreSubtarget : public XCoreGenSubtargetInfo {
@@ -34,7 +35,7 @@
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
- void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
+ void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
};
} // End llvm namespace
Modified: llvm/trunk/utils/TableGen/SubtargetEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/SubtargetEmitter.cpp?rev=134606&r1=134605&r2=134606&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/SubtargetEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/SubtargetEmitter.cpp Thu Jul 7 02:07:08 2011
@@ -605,8 +605,7 @@
<< "// subtarget options.\n"
<< "void llvm::";
OS << Target;
- OS << "Subtarget::ParseSubtargetFeatures(const std::string &FS,\n"
- << " const std::string &CPU) {\n"
+ OS << "Subtarget::ParseSubtargetFeatures(StringRef CPU, StringRef FS) {\n"
<< " DEBUG(dbgs() << \"\\nFeatures:\" << FS);\n"
<< " DEBUG(dbgs() << \"\\nCPU:\" << CPU);\n";
@@ -615,11 +614,7 @@
return;
}
- OS << " SubtargetFeatures Features(FS);\n"
- << " uint64_t Bits = Features.getFeatureBits(CPU, "
- << Target << "SubTypeKV, " << NumProcs << ",\n"
- << " " << Target << "FeatureKV, "
- << NumFeatures << ");\n";
+ OS << " uint64_t Bits = ReInitMCSubtargetInfo(CPU, FS);\n";
for (unsigned i = 0; i < Features.size(); i++) {
// Next record
@@ -629,10 +624,12 @@
const std::string &Attribute = R->getValueAsString("Attribute");
if (Value=="true" || Value=="false")
- OS << " if ((Bits & " << Target << "::" << Instance << ") != 0) "
+ OS << " if ((Bits & " << Target << "::"
+ << Instance << ") != 0) "
<< Attribute << " = " << Value << ";\n";
else
- OS << " if ((Bits & " << Target << "::" << Instance << ") != 0 && "
+ OS << " if ((Bits & " << Target << "::"
+ << Instance << ") != 0 && "
<< Attribute << " < " << Value << ") "
<< Attribute << " = " << Value << ";\n";
}
@@ -663,8 +660,8 @@
// MCInstrInfo initialization routine.
OS << "static inline void Init" << Target
- << "MCSubtargetInfo(MCSubtargetInfo *II) {\n";
- OS << " II->InitMCSubtargetInfo(";
+ << "MCSubtargetInfo(MCSubtargetInfo *II, StringRef CPU, StringRef FS) {\n";
+ OS << " II->InitMCSubtargetInfo(CPU, FS, ";
if (NumFeatures)
OS << Target << "FeatureKV, ";
else
@@ -702,7 +699,8 @@
std::string ClassName = Target + "GenSubtargetInfo";
OS << "namespace llvm {\n";
OS << "struct " << ClassName << " : public TargetSubtargetInfo {\n"
- << " explicit " << ClassName << "();\n"
+ << " explicit " << ClassName << "(StringRef TT, StringRef CPU, "
+ << "StringRef FS);\n"
<< "};\n";
OS << "} // End llvm namespace \n";
@@ -712,9 +710,10 @@
OS << "#undef GET_SUBTARGETINFO_CTOR\n";
OS << "namespace llvm {\n";
- OS << ClassName << "::" << ClassName << "()\n"
+ OS << ClassName << "::" << ClassName << "(StringRef TT, StringRef CPU, "
+ << "StringRef FS)\n"
<< " : TargetSubtargetInfo() {\n"
- << " InitMCSubtargetInfo(";
+ << " InitMCSubtargetInfo(CPU, FS, ";
if (NumFeatures)
OS << Target << "FeatureKV, ";
else
More information about the llvm-commits
mailing list