[llvm-commits] [llvm] r134329 - /llvm/trunk/test/CodeGen/X86/vec_insert-2.ll

[Chandler Carruth]

Author: chandlerc
Date: Sat Jul  2 15:42:08 2011
New Revision: 134329

URL: http://llvm.org/viewvc/llvm-project?rev=134329&view=rev
Log:
FileCheck-ize another test. This one is more clear and runs fewer
commands as a result.

Modified:
    llvm/trunk/test/CodeGen/X86/vec_insert-2.ll

Modified: llvm/trunk/test/CodeGen/X86/vec_insert-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_insert-2.ll?rev=134329&r1=134328&r2=134329&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_insert-2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_insert-2.ll Sat Jul  2 15:42:08 2011
@@ -1,25 +1,42 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 | grep {\$36,} | count 2
-; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 | grep shufps | count 2
-; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 | grep pinsrw | count 1
-; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 | grep movhpd | count 1
-; RUN: llc < %s -march=x86-64 -mattr=+sse2,-sse41 | grep unpcklpd | count 1
+; RUN: llc < %s -march=x86 -mattr=+sse2,-sse41 | FileCheck --check-prefix=X32 %s
+; RUN: llc < %s -march=x86-64 -mattr=+sse2,-sse41 | FileCheck --check-prefix=X64 %s
 
 define <4 x float> @t1(float %s, <4 x float> %tmp) nounwind {
-        %tmp1 = insertelement <4 x float> %tmp, float %s, i32 3
-        ret <4 x float> %tmp1
+; X32: t1:
+; X32: shufps $36
+; X32: ret
+
+  %tmp1 = insertelement <4 x float> %tmp, float %s, i32 3
+  ret <4 x float> %tmp1
 }
 
 define <4 x i32> @t2(i32 %s, <4 x i32> %tmp) nounwind {
-        %tmp1 = insertelement <4 x i32> %tmp, i32 %s, i32 3
-        ret <4 x i32> %tmp1
+; X32: t2:
+; X32: shufps $36
+; X32: ret
+
+  %tmp1 = insertelement <4 x i32> %tmp, i32 %s, i32 3
+  ret <4 x i32> %tmp1
 }
 
 define <2 x double> @t3(double %s, <2 x double> %tmp) nounwind {
-        %tmp1 = insertelement <2 x double> %tmp, double %s, i32 1
-        ret <2 x double> %tmp1
+; X32: t3:
+; X32: movhpd
+; X32: ret
+
+; X64: t3:
+; X64: unpcklpd
+; X64: ret
+
+  %tmp1 = insertelement <2 x double> %tmp, double %s, i32 1
+  ret <2 x double> %tmp1
 }
 
 define <8 x i16> @t4(i16 %s, <8 x i16> %tmp) nounwind {
-        %tmp1 = insertelement <8 x i16> %tmp, i16 %s, i32 5
-        ret <8 x i16> %tmp1
+; X32: t4:
+; X32: pinsrw
+; X32: ret
+
+  %tmp1 = insertelement <8 x i16> %tmp, i16 %s, i32 5
+  ret <8 x i16> %tmp1
 }