[llvm-commits] [dragonegg] r134142 - in /dragonegg/trunk: include/x86/dragonegg/Target.h src/Backend.cpp
Duncan Sands
baldrick at free.fr
Thu Jun 30 04:41:38 PDT 2011
Author: baldrick
Date: Thu Jun 30 06:41:38 2011
New Revision: 134142
URL: http://llvm.org/viewvc/llvm-project?rev=134142&view=rev
Log:
Port commit 134133 from llvm-gcc, unbreaking the build. This way I
can leave on holiday with the buildbots green at least :) Original
commit message: (evancheng) Match createTargetMachine API change.
Modified:
dragonegg/trunk/include/x86/dragonegg/Target.h
dragonegg/trunk/src/Backend.cpp
Modified: dragonegg/trunk/include/x86/dragonegg/Target.h
URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/include/x86/dragonegg/Target.h?rev=134142&r1=134141&r2=134142&view=diff
==============================================================================
--- dragonegg/trunk/include/x86/dragonegg/Target.h (original)
+++ dragonegg/trunk/include/x86/dragonegg/Target.h Thu Jun 30 06:41:38 2011
@@ -262,76 +262,76 @@
/* Turn -march=xx into a CPU type.
*/
-#define LLVM_SET_SUBTARGET_FEATURES(F) \
- { if (TARGET_MACHO && ! strcmp (ix86_arch_string, "apple")) \
- F.setCPU(TARGET_64BIT ? "core2" : "yonah"); \
- else \
- F.setCPU(ix86_arch_string); \
- \
- if (TARGET_64BIT) \
- F.AddFeature("64bit"); \
- else if (target_flags_explicit & OPTION_MASK_ISA_64BIT) \
- F.AddFeature("64bit", false); \
- \
- if (TARGET_MMX) \
- F.AddFeature("mmx"); \
- else if (target_flags_explicit & OPTION_MASK_ISA_MMX) \
- F.AddFeature("mmx", false); \
- \
- if (TARGET_3DNOW) \
- F.AddFeature("3dnow"); \
- else if (target_flags_explicit & OPTION_MASK_ISA_3DNOW) \
- F.AddFeature("3dnow", false); \
- \
- if (TARGET_3DNOW_A) \
- F.AddFeature("3dnowa"); \
- else if (target_flags_explicit & OPTION_MASK_ISA_3DNOW_A) \
- F.AddFeature("3dnowa", false); \
- \
- if (TARGET_SSE) \
- F.AddFeature("sse"); \
- else if (target_flags_explicit & OPTION_MASK_ISA_SSE) \
- F.AddFeature("sse", false); \
- \
- if (TARGET_SSE2) \
- F.AddFeature("sse2"); \
- else if (target_flags_explicit & OPTION_MASK_ISA_SSE2) \
- F.AddFeature("sse2", false); \
- \
- if (TARGET_SSE3) \
- F.AddFeature("sse3"); \
- else if (target_flags_explicit & OPTION_MASK_ISA_SSE3) \
- F.AddFeature("sse3", false); \
- \
- if (TARGET_SSSE3) \
- F.AddFeature("ssse3"); \
- else if (target_flags_explicit & OPTION_MASK_ISA_SSSE3) \
- F.AddFeature("ssse3", false); \
- \
- if (TARGET_SSE4_1) \
- F.AddFeature("sse41"); \
- else if (target_flags_explicit & OPTION_MASK_ISA_SSE4_1) \
- F.AddFeature("sse41", false); \
- \
- if (TARGET_SSE4_2) \
- F.AddFeature("sse42"); \
- else if (target_flags_explicit & OPTION_MASK_ISA_SSE4_2) \
- F.AddFeature("sse42", false); \
- \
- if (TARGET_AVX) \
- F.AddFeature("avx"); \
- else if (target_flags_explicit & OPTION_MASK_ISA_AVX) \
- F.AddFeature("avx", false); \
- \
- if (TARGET_FMA) \
- F.AddFeature("fma3"); \
- else if (target_flags_explicit & OPTION_MASK_ISA_FMA) \
- F.AddFeature("fma3", false); \
- \
- if (TARGET_SSE4A) \
- F.AddFeature("sse4a"); \
- else if (target_flags_explicit & OPTION_MASK_ISA_SSE4A) \
- F.AddFeature("sse4a", false); \
+#define LLVM_SET_SUBTARGET_FEATURES(C, F) \
+ { if (TARGET_MACHO && ! strcmp (ix86_arch_string, "apple")) \
+ C = TARGET_64BIT ? "core2" : "yonah"; \
+ else \
+ C = ix86_arch_string; \
+ \
+ if (TARGET_64BIT) \
+ F.AddFeature("64bit"); \
+ else if (target_flags_explicit & OPTION_MASK_ISA_64BIT) \
+ F.AddFeature("64bit", false); \
+ \
+ if (TARGET_MMX) \
+ F.AddFeature("mmx"); \
+ else if (target_flags_explicit & OPTION_MASK_ISA_MMX) \
+ F.AddFeature("mmx", false); \
+ \
+ if (TARGET_3DNOW) \
+ F.AddFeature("3dnow"); \
+ else if (target_flags_explicit & OPTION_MASK_ISA_3DNOW) \
+ F.AddFeature("3dnow", false); \
+ \
+ if (TARGET_3DNOW_A) \
+ F.AddFeature("3dnowa"); \
+ else if (target_flags_explicit & OPTION_MASK_ISA_3DNOW_A) \
+ F.AddFeature("3dnowa", false); \
+ \
+ if (TARGET_SSE) \
+ F.AddFeature("sse"); \
+ else if (target_flags_explicit & OPTION_MASK_ISA_SSE) \
+ F.AddFeature("sse", false); \
+ \
+ if (TARGET_SSE2) \
+ F.AddFeature("sse2"); \
+ else if (target_flags_explicit & OPTION_MASK_ISA_SSE2) \
+ F.AddFeature("sse2", false); \
+ \
+ if (TARGET_SSE3) \
+ F.AddFeature("sse3"); \
+ else if (target_flags_explicit & OPTION_MASK_ISA_SSE3) \
+ F.AddFeature("sse3", false); \
+ \
+ if (TARGET_SSSE3) \
+ F.AddFeature("ssse3"); \
+ else if (target_flags_explicit & OPTION_MASK_ISA_SSSE3) \
+ F.AddFeature("ssse3", false); \
+ \
+ if (TARGET_SSE4_1) \
+ F.AddFeature("sse41"); \
+ else if (target_flags_explicit & OPTION_MASK_ISA_SSE4_1) \
+ F.AddFeature("sse41", false); \
+ \
+ if (TARGET_SSE4_2) \
+ F.AddFeature("sse42"); \
+ else if (target_flags_explicit & OPTION_MASK_ISA_SSE4_2) \
+ F.AddFeature("sse42", false); \
+ \
+ if (TARGET_AVX) \
+ F.AddFeature("avx"); \
+ else if (target_flags_explicit & OPTION_MASK_ISA_AVX) \
+ F.AddFeature("avx", false); \
+ \
+ if (TARGET_FMA) \
+ F.AddFeature("fma3"); \
+ else if (target_flags_explicit & OPTION_MASK_ISA_FMA) \
+ F.AddFeature("fma3", false); \
+ \
+ if (TARGET_SSE4A) \
+ F.AddFeature("sse4a"); \
+ else if (target_flags_explicit & OPTION_MASK_ISA_SSE4A) \
+ F.AddFeature("sse4a", false); \
}
#define LLVM_SET_IMPLICIT_FLOAT(flag_no_implicit_float) \
Modified: dragonegg/trunk/src/Backend.cpp
URL: http://llvm.org/viewvc/llvm-project/dragonegg/trunk/src/Backend.cpp?rev=134142&r1=134141&r2=134142&view=diff
==============================================================================
--- dragonegg/trunk/src/Backend.cpp (original)
+++ dragonegg/trunk/src/Backend.cpp Thu Jun 30 06:41:38 2011
@@ -405,12 +405,13 @@
std::string FeatureStr;
// The target can set LLVM_SET_SUBTARGET_FEATURES to configure the LLVM
// backend.
+ std::string CPU;
#ifdef LLVM_SET_SUBTARGET_FEATURES
SubtargetFeatures Features;
- LLVM_SET_SUBTARGET_FEATURES(Features);
+ LLVM_SET_SUBTARGET_FEATURES(CPU, Features);
FeatureStr = Features.getString();
#endif
- TheTarget = TME->createTargetMachine(TargetTriple, FeatureStr);
+ TheTarget = TME->createTargetMachine(TargetTriple, CPU, FeatureStr);
TheTarget->setMCUseCFI(flag_dwarf2_cfi_asm);
assert(TheTarget->getTargetData()->isBigEndian() == BYTES_BIG_ENDIAN);
}
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