[llvm-commits] [llvm] r134127 - in /llvm/trunk: include/llvm/MC/ include/llvm/Target/ lib/ExecutionEngine/ lib/MC/ lib/MC/MCDisassembler/ lib/Target/ARM/ lib/Target/ARM/AsmParser/ lib/Target/Alpha/ lib/Target/Blackfin/ lib/Target/CBackend/ lib/Target/CellSPU/ lib/Target/CppBackend/ lib/Target/MBlaze/ lib/Target/MBlaze/AsmParser/ lib/Target/MSP430/ lib/Target/Mips/ lib/Target/PTX/ lib/Target/PowerPC/ lib/Target/Sparc/ lib/Target/SystemZ/ lib/Target/X86/ lib/Target/XCore/ tools/llc/ tools/llvm-mc/ tools/llvm-objdump/ too...
Evan Cheng
evan.cheng at apple.com
Wed Jun 29 18:53:37 PDT 2011
Author: evancheng
Date: Wed Jun 29 20:53:36 2011
New Revision: 134127
URL: http://llvm.org/viewvc/llvm-project?rev=134127&view=rev
Log:
Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name to
be the first encoded as the first feature. It then uses the CPU name to look up
features / scheduling itineray even though clients know full well the CPU name
being used to query these properties.
The fix is to just have the clients explictly pass the CPU name!
Modified:
llvm/trunk/include/llvm/MC/SubtargetFeature.h
llvm/trunk/include/llvm/Target/TargetRegistry.h
llvm/trunk/lib/ExecutionEngine/TargetSelect.cpp
llvm/trunk/lib/MC/MCDisassembler/Disassembler.cpp
llvm/trunk/lib/MC/MCDisassembler/EDDisassembler.cpp
llvm/trunk/lib/MC/SubtargetFeature.cpp
llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp
llvm/trunk/lib/Target/ARM/ARMSubtarget.h
llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp
llvm/trunk/lib/Target/ARM/ARMTargetMachine.h
llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmLexer.cpp
llvm/trunk/lib/Target/Alpha/AlphaSubtarget.cpp
llvm/trunk/lib/Target/Alpha/AlphaSubtarget.h
llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.cpp
llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.h
llvm/trunk/lib/Target/Blackfin/BlackfinSubtarget.cpp
llvm/trunk/lib/Target/Blackfin/BlackfinSubtarget.h
llvm/trunk/lib/Target/Blackfin/BlackfinTargetMachine.cpp
llvm/trunk/lib/Target/Blackfin/BlackfinTargetMachine.h
llvm/trunk/lib/Target/CBackend/CTargetMachine.h
llvm/trunk/lib/Target/CellSPU/SPUSubtarget.cpp
llvm/trunk/lib/Target/CellSPU/SPUSubtarget.h
llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.cpp
llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.h
llvm/trunk/lib/Target/CppBackend/CPPTargetMachine.h
llvm/trunk/lib/Target/MBlaze/AsmParser/MBlazeAsmLexer.cpp
llvm/trunk/lib/Target/MBlaze/MBlazeSubtarget.cpp
llvm/trunk/lib/Target/MBlaze/MBlazeSubtarget.h
llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.cpp
llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.h
llvm/trunk/lib/Target/MSP430/MSP430Subtarget.cpp
llvm/trunk/lib/Target/MSP430/MSP430Subtarget.h
llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.cpp
llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.h
llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp
llvm/trunk/lib/Target/Mips/MipsSubtarget.h
llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp
llvm/trunk/lib/Target/Mips/MipsTargetMachine.h
llvm/trunk/lib/Target/PTX/PTXSubtarget.cpp
llvm/trunk/lib/Target/PTX/PTXSubtarget.h
llvm/trunk/lib/Target/PTX/PTXTargetMachine.cpp
llvm/trunk/lib/Target/PTX/PTXTargetMachine.h
llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp
llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h
llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp
llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h
llvm/trunk/lib/Target/Sparc/SparcSubtarget.cpp
llvm/trunk/lib/Target/Sparc/SparcSubtarget.h
llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp
llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h
llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.cpp
llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.h
llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.cpp
llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.h
llvm/trunk/lib/Target/X86/X86Subtarget.cpp
llvm/trunk/lib/Target/X86/X86Subtarget.h
llvm/trunk/lib/Target/X86/X86TargetMachine.cpp
llvm/trunk/lib/Target/X86/X86TargetMachine.h
llvm/trunk/lib/Target/XCore/XCoreSubtarget.cpp
llvm/trunk/lib/Target/XCore/XCoreSubtarget.h
llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp
llvm/trunk/lib/Target/XCore/XCoreTargetMachine.h
llvm/trunk/tools/llc/llc.cpp
llvm/trunk/tools/llvm-mc/llvm-mc.cpp
llvm/trunk/tools/llvm-objdump/llvm-objdump.cpp
llvm/trunk/tools/lto/LTOCodeGenerator.cpp
llvm/trunk/tools/lto/LTOModule.cpp
llvm/trunk/utils/TableGen/SubtargetEmitter.cpp
Modified: llvm/trunk/include/llvm/MC/SubtargetFeature.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/SubtargetFeature.h?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/include/llvm/MC/SubtargetFeature.h (original)
+++ llvm/trunk/include/llvm/MC/SubtargetFeature.h Wed Jun 29 20:53:36 2011
@@ -80,26 +80,19 @@
std::string getString() const;
void setString(const std::string &Initial);
- /// Set the CPU string. Replaces previous setting. Setting to "" clears CPU.
- void setCPU(const std::string &String);
-
- /// Setting CPU string only if no string is set.
- void setCPUIfNone(const std::string &String);
-
- /// Returns current CPU string.
- const std::string & getCPU() const;
-
/// Adding Features.
void AddFeature(const std::string &String, bool IsEnabled = true);
- /// Get feature bits.
- uint64_t getBits(const SubtargetFeatureKV *CPUTable,
- size_t CPUTableSize,
- const SubtargetFeatureKV *FeatureTable,
- size_t FeatureTableSize);
+ /// Get feature bits of a CPU.
+ uint64_t getFeatureBits(const std::string &CPU,
+ const SubtargetFeatureKV *CPUTable,
+ size_t CPUTableSize,
+ const SubtargetFeatureKV *FeatureTable,
+ size_t FeatureTableSize);
- /// Get info pointer
- void *getInfo(const SubtargetInfoKV *Table, size_t TableSize);
+ /// Get scheduling itinerary of a CPU.
+ void *getItinerary(const std::string &CPU,
+ const SubtargetInfoKV *Table, size_t TableSize);
/// Print feature string.
void print(raw_ostream &OS) const;
@@ -109,8 +102,7 @@
/// Retrieve a formatted string of the default features for the specified
/// target triple.
- void getDefaultSubtargetFeatures(const std::string &CPU,
- const Triple& Triple);
+ void getDefaultSubtargetFeatures(const Triple& Triple);
};
} // End namespace llvm
Modified: llvm/trunk/include/llvm/Target/TargetRegistry.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetRegistry.h?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetRegistry.h (original)
+++ llvm/trunk/include/llvm/Target/TargetRegistry.h Wed Jun 29 20:53:36 2011
@@ -71,6 +71,7 @@
typedef MCRegisterInfo *(*MCRegInfoCtorFnTy)(void);
typedef TargetMachine *(*TargetMachineCtorTy)(const Target &T,
const std::string &TT,
+ const std::string &CPU,
const std::string &Features);
typedef AsmPrinter *(*AsmPrinterCtorTy)(TargetMachine &TM,
MCStreamer &Streamer);
@@ -269,10 +270,11 @@
/// either the target triple from the module, or the target triple of the
/// host if that does not exist.
TargetMachine *createTargetMachine(const std::string &Triple,
+ const std::string &CPU,
const std::string &Features) const {
if (!TargetMachineCtorFn)
return 0;
- return TargetMachineCtorFn(*this, Triple, Features);
+ return TargetMachineCtorFn(*this, Triple, CPU, Features);
}
/// createAsmBackend - Create a target specific assembly parser.
@@ -796,8 +798,9 @@
private:
static TargetMachine *Allocator(const Target &T, const std::string &TT,
+ const std::string &CPU,
const std::string &FS) {
- return new TargetMachineImpl(T, TT, FS);
+ return new TargetMachineImpl(T, TT, CPU, FS);
}
};
Modified: llvm/trunk/lib/ExecutionEngine/TargetSelect.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/ExecutionEngine/TargetSelect.cpp?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/ExecutionEngine/TargetSelect.cpp (original)
+++ llvm/trunk/lib/ExecutionEngine/TargetSelect.cpp Wed Jun 29 20:53:36 2011
@@ -75,9 +75,8 @@
// Package up features to be passed to target/subtarget
std::string FeaturesStr;
- if (!MCPU.empty() || !MAttrs.empty()) {
+ if (!MAttrs.empty()) {
SubtargetFeatures Features;
- Features.setCPU(MCPU);
for (unsigned i = 0; i != MAttrs.size(); ++i)
Features.AddFeature(MAttrs[i]);
FeaturesStr = Features.getString();
@@ -85,7 +84,7 @@
// Allocate a target...
TargetMachine *Target =
- TheTarget->createTargetMachine(TheTriple.getTriple(), FeaturesStr);
+ TheTarget->createTargetMachine(TheTriple.getTriple(), MCPU, FeaturesStr);
assert(Target && "Could not allocate target machine!");
return Target;
}
Modified: llvm/trunk/lib/MC/MCDisassembler/Disassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCDisassembler/Disassembler.cpp?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/MC/MCDisassembler/Disassembler.cpp (original)
+++ llvm/trunk/lib/MC/MCDisassembler/Disassembler.cpp Wed Jun 29 20:53:36 2011
@@ -55,11 +55,13 @@
// Package up features to be passed to target/subtarget
std::string FeaturesStr;
+ std::string CPU;
// FIXME: We shouldn't need to do this (and link in codegen).
// When we split this out, we should do it in a way that makes
// it straightforward to switch subtargets on the fly.
- TargetMachine *TM = TheTarget->createTargetMachine(TripleName, FeaturesStr);
+ TargetMachine *TM = TheTarget->createTargetMachine(TripleName, CPU,
+ FeaturesStr);
assert(TM && "Unable to create target machine!");
// Get the target assembler info needed to setup the context.
Modified: llvm/trunk/lib/MC/MCDisassembler/EDDisassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCDisassembler/EDDisassembler.cpp?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/MC/MCDisassembler/EDDisassembler.cpp (original)
+++ llvm/trunk/lib/MC/MCDisassembler/EDDisassembler.cpp Wed Jun 29 20:53:36 2011
@@ -167,9 +167,9 @@
if (!Tgt)
return;
+ std::string CPU;
std::string featureString;
-
- TargetMachine.reset(Tgt->createTargetMachine(tripleString,
+ TargetMachine.reset(Tgt->createTargetMachine(tripleString, CPU,
featureString));
const TargetRegisterInfo *registerInfo = TargetMachine->getRegisterInfo();
Modified: llvm/trunk/lib/MC/SubtargetFeature.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/SubtargetFeature.cpp?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/MC/SubtargetFeature.cpp (original)
+++ llvm/trunk/lib/MC/SubtargetFeature.cpp Wed Jun 29 20:53:36 2011
@@ -63,6 +63,9 @@
/// Split - Splits a string of comma separated items in to a vector of strings.
///
static void Split(std::vector<std::string> &V, const std::string &S) {
+ if (S.empty())
+ return;
+
// Start at beginning of string.
size_t Pos = 0;
while (true) {
@@ -88,7 +91,7 @@
std::string Result;
// If the vector is not empty
if (!V.empty()) {
- // Start with the CPU feature
+ // Start with the first feature
Result = V[0];
// For each successive feature
for (size_t i = 1; i < V.size(); i++) {
@@ -186,27 +189,6 @@
Split(Features, LowercaseString(Initial));
}
-
-/// setCPU - Set the CPU string. Replaces previous setting. Setting to ""
-/// clears CPU.
-void SubtargetFeatures::setCPU(const std::string &String) {
- Features[0] = LowercaseString(String);
-}
-
-
-/// setCPUIfNone - Setting CPU string only if no string is set.
-///
-void SubtargetFeatures::setCPUIfNone(const std::string &String) {
- if (Features[0].empty()) setCPU(String);
-}
-
-/// getCPU - Returns current CPU.
-///
-const std::string & SubtargetFeatures::getCPU() const {
- return Features[0];
-}
-
-
/// SetImpliedBits - For each feature that is (transitively) implied by this
/// feature, set it.
///
@@ -245,12 +227,13 @@
}
}
-/// getBits - Get feature bits.
+/// getFeatureBits - Get feature bits a CPU.
///
-uint64_t SubtargetFeatures::getBits(const SubtargetFeatureKV *CPUTable,
- size_t CPUTableSize,
- const SubtargetFeatureKV *FeatureTable,
- size_t FeatureTableSize) {
+uint64_t SubtargetFeatures::getFeatureBits(const std::string &CPU,
+ const SubtargetFeatureKV *CPUTable,
+ size_t CPUTableSize,
+ const SubtargetFeatureKV *FeatureTable,
+ size_t FeatureTableSize) {
assert(CPUTable && "missing CPU table");
assert(FeatureTable && "missing features table");
#ifndef NDEBUG
@@ -266,12 +249,11 @@
uint64_t Bits = 0; // Resulting bits
// Check if help is needed
- if (Features[0] == "help")
+ if (CPU == "help")
Help(CPUTable, CPUTableSize, FeatureTable, FeatureTableSize);
// Find CPU entry
- const SubtargetFeatureKV *CPUEntry =
- Find(Features[0], CPUTable, CPUTableSize);
+ const SubtargetFeatureKV *CPUEntry = Find(CPU, CPUTable, CPUTableSize);
// If there is a match
if (CPUEntry) {
// Set base feature bits
@@ -284,12 +266,12 @@
SetImpliedBits(Bits, &FE, FeatureTable, FeatureTableSize);
}
} else {
- errs() << "'" << Features[0]
+ errs() << "'" << CPU
<< "' is not a recognized processor for this target"
<< " (ignoring processor)\n";
}
// Iterate through each feature
- for (size_t i = 1; i < Features.size(); i++) {
+ for (size_t i = 0, E = Features.size(); i < E; i++) {
const std::string &Feature = Features[i];
// Check for help
@@ -323,9 +305,10 @@
return Bits;
}
-/// Get info pointer
-void *SubtargetFeatures::getInfo(const SubtargetInfoKV *Table,
- size_t TableSize) {
+/// Get scheduling itinerary of a CPU.
+void *SubtargetFeatures::getItinerary(const std::string &CPU,
+ const SubtargetInfoKV *Table,
+ size_t TableSize) {
assert(Table && "missing table");
#ifndef NDEBUG
for (size_t i = 1; i < TableSize; i++) {
@@ -334,12 +317,12 @@
#endif
// Find entry
- const SubtargetInfoKV *Entry = Find(Features[0], Table, TableSize);
+ const SubtargetInfoKV *Entry = Find(CPU, Table, TableSize);
if (Entry) {
return Entry->Value;
} else {
- errs() << "'" << Features[0]
+ errs() << "'" << CPU
<< "' is not a recognized processor for this target"
<< " (ignoring processor)\n";
return NULL;
@@ -367,10 +350,7 @@
/// subtarget. It would be better if we could encode this information
/// into the IR. See <rdar://5972456>.
///
-void SubtargetFeatures::getDefaultSubtargetFeatures(const std::string &CPU,
- const Triple& Triple) {
- setCPU(CPU);
-
+void SubtargetFeatures::getDefaultSubtargetFeatures(const Triple& Triple) {
if (Triple.getVendor() == Triple::Apple) {
if (Triple.getArch() == Triple::ppc) {
// powerpc-apple-*
Modified: llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp Wed Jun 29 20:53:36 2011
@@ -30,8 +30,8 @@
StrictAlign("arm-strict-align", cl::Hidden,
cl::desc("Disallow all unaligned memory accesses"));
-ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &FS,
- bool isT)
+ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &CPU,
+ const std::string &FS, bool isT)
: ARMArchVersion(V4)
, ARMProcFamily(Others)
, ARMFPUType(None)
@@ -56,7 +56,7 @@
, FPOnlySP(false)
, AllowsUnalignedMem(false)
, stackAlignment(4)
- , CPUString("generic")
+ , CPUString(CPU)
, TargetTriple(TT)
, TargetABI(ARM_ABI_APCS) {
// Determine default and user specified characteristics
@@ -64,9 +64,11 @@
// When no arch is specified either by CPU or by attributes, make the default
// ARMv4T.
const char *ARMArchFeature = "";
+ if (CPUString.empty())
+ CPUString = "generic";
if (CPUString == "generic" && (FS.empty() || FS == "generic")) {
ARMArchVersion = V4T;
- ARMArchFeature = ",+v4t";
+ ARMArchFeature = "+v4t";
}
// Set the boolean corresponding to the current target triple, or the default
@@ -85,29 +87,29 @@
unsigned SubVer = TT[Idx];
if (SubVer >= '7' && SubVer <= '9') {
ARMArchVersion = V7A;
- ARMArchFeature = ",+v7a";
+ ARMArchFeature = "+v7a";
if (Len >= Idx+2 && TT[Idx+1] == 'm') {
ARMArchVersion = V7M;
- ARMArchFeature = ",+v7m";
+ ARMArchFeature = "+v7m";
}
} else if (SubVer == '6') {
ARMArchVersion = V6;
- ARMArchFeature = ",+v6";
+ ARMArchFeature = "+v6";
if (Len >= Idx+3 && TT[Idx+1] == 't' && TT[Idx+2] == '2') {
ARMArchVersion = V6T2;
- ARMArchFeature = ",+v6t2";
+ ARMArchFeature = "+v6t2";
}
} else if (SubVer == '5') {
ARMArchVersion = V5T;
- ARMArchFeature = ",+v5t";
+ ARMArchFeature = "+v5t";
if (Len >= Idx+3 && TT[Idx+1] == 't' && TT[Idx+2] == 'e') {
ARMArchVersion = V5TE;
- ARMArchFeature = ",+v5te";
+ ARMArchFeature = "+v5te";
}
} else if (SubVer == '4') {
if (Len >= Idx+2 && TT[Idx+1] == 't') {
ARMArchVersion = V4T;
- ARMArchFeature = ",+v4t";
+ ARMArchFeature = "+v4t";
} else {
ARMArchVersion = V4;
ARMArchFeature = "";
@@ -129,7 +131,7 @@
FSWithArch = std::string(ARMArchFeature) + FS;
else
FSWithArch = FS;
- CPUString = ParseSubtargetFeatures(FSWithArch, CPUString);
+ ParseSubtargetFeatures(FSWithArch, CPUString);
// After parsing Itineraries, set ItinData.IssueWidth.
computeIssueWidth();
Modified: llvm/trunk/lib/Target/ARM/ARMSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMSubtarget.h?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMSubtarget.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMSubtarget.h Wed Jun 29 20:53:36 2011
@@ -153,7 +153,8 @@
/// This constructor initializes the data members to match that
/// of the specified triple.
///
- ARMSubtarget(const std::string &TT, const std::string &FS, bool isThumb);
+ ARMSubtarget(const std::string &TT, const std::string &CPU,
+ const std::string &FS, bool isThumb);
/// getMaxInlineSizeThreshold - Returns the maximum memset / memcpy size
/// that still makes it profitable to inline the call.
@@ -164,8 +165,7 @@
}
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
- std::string ParseSubtargetFeatures(const std::string &FS,
- const std::string &CPU);
+ void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
void computeIssueWidth();
Modified: llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp Wed Jun 29 20:53:36 2011
@@ -78,10 +78,11 @@
///
ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T,
const std::string &TT,
+ const std::string &CPU,
const std::string &FS,
bool isThumb)
: LLVMTargetMachine(T, TT),
- Subtarget(TT, FS, isThumb),
+ Subtarget(TT, CPU, FS, isThumb),
JITInfo(),
InstrItins(Subtarget.getInstrItineraryData()) {
DefRelocModel = getRelocationModel();
@@ -92,8 +93,9 @@
}
ARMTargetMachine::ARMTargetMachine(const Target &T, const std::string &TT,
+ const std::string &CPU,
const std::string &FS)
- : ARMBaseTargetMachine(T, TT, FS, false), InstrInfo(Subtarget),
+ : ARMBaseTargetMachine(T, TT, CPU, FS, false), InstrInfo(Subtarget),
DataLayout(Subtarget.isAPCS_ABI() ?
std::string("e-p:32:32-f64:32:64-i64:32:64-"
"v128:32:128-v64:32:64-n32") :
@@ -109,8 +111,9 @@
}
ThumbTargetMachine::ThumbTargetMachine(const Target &T, const std::string &TT,
+ const std::string &CPU,
const std::string &FS)
- : ARMBaseTargetMachine(T, TT, FS, true),
+ : ARMBaseTargetMachine(T, TT, CPU, FS, true),
InstrInfo(Subtarget.hasThumb2()
? ((ARMBaseInstrInfo*)new Thumb2InstrInfo(Subtarget))
: ((ARMBaseInstrInfo*)new Thumb1InstrInfo(Subtarget))),
Modified: llvm/trunk/lib/Target/ARM/ARMTargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetMachine.h?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMTargetMachine.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMTargetMachine.h Wed Jun 29 20:53:36 2011
@@ -41,7 +41,8 @@
public:
ARMBaseTargetMachine(const Target &T, const std::string &TT,
- const std::string &FS, bool isThumb);
+ const std::string &CPU, const std::string &FS,
+ bool isThumb);
virtual ARMJITInfo *getJITInfo() { return &JITInfo; }
virtual const ARMSubtarget *getSubtargetImpl() const { return &Subtarget; }
@@ -70,7 +71,7 @@
ARMFrameLowering FrameLowering;
public:
ARMTargetMachine(const Target &T, const std::string &TT,
- const std::string &FS);
+ const std::string &CPU, const std::string &FS);
virtual const ARMRegisterInfo *getRegisterInfo() const {
return &InstrInfo.getRegisterInfo();
@@ -109,7 +110,7 @@
OwningPtr<ARMFrameLowering> FrameLowering;
public:
ThumbTargetMachine(const Target &T, const std::string &TT,
- const std::string &FS);
+ const std::string &CPU, const std::string &FS);
/// returns either Thumb1RegisterInfo or Thumb2RegisterInfo
virtual const ARMBaseRegisterInfo *getRegisterInfo() const {
Modified: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmLexer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmLexer.cpp?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmLexer.cpp (original)
+++ llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmLexer.cpp Wed Jun 29 20:53:36 2011
@@ -87,8 +87,9 @@
: ARMBaseAsmLexer(T, MAI) {
std::string tripleString("arm-unknown-unknown");
std::string featureString;
+ std::string CPU;
OwningPtr<const TargetMachine>
- targetMachine(T.createTargetMachine(tripleString, featureString));
+ targetMachine(T.createTargetMachine(tripleString, CPU, featureString));
InitRegisterMap(targetMachine->getRegisterInfo());
}
};
@@ -99,8 +100,9 @@
: ARMBaseAsmLexer(T, MAI) {
std::string tripleString("thumb-unknown-unknown");
std::string featureString;
+ std::string CPU;
OwningPtr<const TargetMachine>
- targetMachine(T.createTargetMachine(tripleString, featureString));
+ targetMachine(T.createTargetMachine(tripleString, CPU, featureString));
InitRegisterMap(targetMachine->getRegisterInfo());
}
};
Modified: llvm/trunk/lib/Target/Alpha/AlphaSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaSubtarget.cpp?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Alpha/AlphaSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/Alpha/AlphaSubtarget.cpp Wed Jun 29 20:53:36 2011
@@ -16,10 +16,13 @@
#include "AlphaGenSubtarget.inc"
using namespace llvm;
-AlphaSubtarget::AlphaSubtarget(const std::string &TT, const std::string &FS)
+AlphaSubtarget::AlphaSubtarget(const std::string &TT, const std::string &CPU,
+ const std::string &FS)
: HasCT(false) {
- std::string CPU = "generic";
+ std::string CPUName = CPU;
+ if (CPUName.empty())
+ CPUName = "generic";
// Parse features string.
- ParseSubtargetFeatures(FS, CPU);
+ ParseSubtargetFeatures(FS, CPUName);
}
Modified: llvm/trunk/lib/Target/Alpha/AlphaSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaSubtarget.h?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Alpha/AlphaSubtarget.h (original)
+++ llvm/trunk/lib/Target/Alpha/AlphaSubtarget.h Wed Jun 29 20:53:36 2011
@@ -31,12 +31,12 @@
/// This constructor initializes the data members to match that
/// of the specified triple.
///
- AlphaSubtarget(const std::string &TT, const std::string &FS);
+ AlphaSubtarget(const std::string &TT, const std::string &CPU,
+ const std::string &FS);
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
- std::string ParseSubtargetFeatures(const std::string &FS,
- const std::string &CPU);
+ void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
bool hasCT() const { return HasCT; }
};
Modified: llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.cpp?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.cpp Wed Jun 29 20:53:36 2011
@@ -25,11 +25,12 @@
}
AlphaTargetMachine::AlphaTargetMachine(const Target &T, const std::string &TT,
+ const std::string &CPU,
const std::string &FS)
: LLVMTargetMachine(T, TT),
DataLayout("e-f128:128:128-n64"),
FrameLowering(Subtarget),
- Subtarget(TT, FS),
+ Subtarget(TT, CPU, FS),
TLInfo(*this),
TSInfo(*this) {
setRelocationModel(Reloc::PIC_);
Modified: llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.h?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.h (original)
+++ llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.h Wed Jun 29 20:53:36 2011
@@ -37,7 +37,7 @@
public:
AlphaTargetMachine(const Target &T, const std::string &TT,
- const std::string &FS);
+ const std::string &CPU, const std::string &FS);
virtual const AlphaInstrInfo *getInstrInfo() const { return &InstrInfo; }
virtual const TargetFrameLowering *getFrameLowering() const {
Modified: llvm/trunk/lib/Target/Blackfin/BlackfinSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Blackfin/BlackfinSubtarget.cpp?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Blackfin/BlackfinSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/Blackfin/BlackfinSubtarget.cpp Wed Jun 29 20:53:36 2011
@@ -17,6 +17,7 @@
using namespace llvm;
BlackfinSubtarget::BlackfinSubtarget(const std::string &TT,
+ const std::string &CPU,
const std::string &FS)
: sdram(false),
icplb(false),
@@ -30,7 +31,9 @@
wa_killed_mmr(false),
wa_rets(false)
{
- std::string CPU = "generic";
+ std::string CPUName = CPU;
+ if (CPUName.empty())
+ CPUName = "generic";
// Parse features string.
- ParseSubtargetFeatures(FS, CPU);
+ ParseSubtargetFeatures(FS, CPUName);
}
Modified: llvm/trunk/lib/Target/Blackfin/BlackfinSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Blackfin/BlackfinSubtarget.h?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Blackfin/BlackfinSubtarget.h (original)
+++ llvm/trunk/lib/Target/Blackfin/BlackfinSubtarget.h Wed Jun 29 20:53:36 2011
@@ -32,11 +32,12 @@
bool wa_killed_mmr;
bool wa_rets;
public:
- BlackfinSubtarget(const std::string &TT, const std::string &FS);
+ BlackfinSubtarget(const std::string &TT, const std::string &CPU,
+ const std::string &FS);
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
- std::string ParseSubtargetFeatures(const std::string &FS,
+ void ParseSubtargetFeatures(const std::string &FS,
const std::string &CPU);
};
Modified: llvm/trunk/lib/Target/Blackfin/BlackfinTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Blackfin/BlackfinTargetMachine.cpp?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Blackfin/BlackfinTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/Blackfin/BlackfinTargetMachine.cpp Wed Jun 29 20:53:36 2011
@@ -26,10 +26,11 @@
BlackfinTargetMachine::BlackfinTargetMachine(const Target &T,
const std::string &TT,
+ const std::string &CPU,
const std::string &FS)
: LLVMTargetMachine(T, TT),
DataLayout("e-p:32:32-i64:32-f64:32-n32"),
- Subtarget(TT, FS),
+ Subtarget(TT, CPU, FS),
TLInfo(*this),
TSInfo(*this),
InstrInfo(Subtarget),
Modified: llvm/trunk/lib/Target/Blackfin/BlackfinTargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Blackfin/BlackfinTargetMachine.h?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Blackfin/BlackfinTargetMachine.h (original)
+++ llvm/trunk/lib/Target/Blackfin/BlackfinTargetMachine.h Wed Jun 29 20:53:36 2011
@@ -36,7 +36,7 @@
BlackfinIntrinsicInfo IntrinsicInfo;
public:
BlackfinTargetMachine(const Target &T, const std::string &TT,
- const std::string &FS);
+ const std::string &CPU, const std::string &FS);
virtual const BlackfinInstrInfo *getInstrInfo() const { return &InstrInfo; }
virtual const TargetFrameLowering *getFrameLowering() const {
Modified: llvm/trunk/lib/Target/CBackend/CTargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CBackend/CTargetMachine.h?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CBackend/CTargetMachine.h (original)
+++ llvm/trunk/lib/Target/CBackend/CTargetMachine.h Wed Jun 29 20:53:36 2011
@@ -20,7 +20,8 @@
namespace llvm {
struct CTargetMachine : public TargetMachine {
- CTargetMachine(const Target &T, const std::string &TT, const std::string &FS)
+ CTargetMachine(const Target &T, const std::string &TT,
+ const std::string &CPU, const std::string &FS)
: TargetMachine(T) {}
virtual bool addPassesToEmitFile(PassManagerBase &PM,
Modified: llvm/trunk/lib/Target/CellSPU/SPUSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUSubtarget.cpp?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CellSPU/SPUSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/CellSPU/SPUSubtarget.cpp Wed Jun 29 20:53:36 2011
@@ -19,7 +19,8 @@
using namespace llvm;
-SPUSubtarget::SPUSubtarget(const std::string &TT, const std::string &FS) :
+SPUSubtarget::SPUSubtarget(const std::string &TT, const std::string &CPU,
+ const std::string &FS) :
StackAlignment(16),
ProcDirective(SPU::DEFAULT_PROC),
UseLargeMem(false)
Modified: llvm/trunk/lib/Target/CellSPU/SPUSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUSubtarget.h?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CellSPU/SPUSubtarget.h (original)
+++ llvm/trunk/lib/Target/CellSPU/SPUSubtarget.h Wed Jun 29 20:53:36 2011
@@ -49,12 +49,12 @@
/// This constructor initializes the data members to match that
/// of the specified triple.
///
- SPUSubtarget(const std::string &TT, const std::string &FS);
+ SPUSubtarget(const std::string &TT, const std::string &CPU,
+ const std::string &FS);
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
- std::string ParseSubtargetFeatures(const std::string &FS,
- const std::string &CPU);
+ void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
/// SetJITMode - This is called to inform the subtarget info that we are
/// producing code for the JIT.
Modified: llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.cpp?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.cpp Wed Jun 29 20:53:36 2011
@@ -35,9 +35,9 @@
}
SPUTargetMachine::SPUTargetMachine(const Target &T, const std::string &TT,
- const std::string &FS)
+ const std::string &CPU,const std::string &FS)
: LLVMTargetMachine(T, TT),
- Subtarget(TT, FS),
+ Subtarget(TT, CPU, FS),
DataLayout(Subtarget.getTargetDataString()),
InstrInfo(*this),
FrameLowering(Subtarget),
Modified: llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.h?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.h (original)
+++ llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.h Wed Jun 29 20:53:36 2011
@@ -39,7 +39,7 @@
InstrItineraryData InstrItins;
public:
SPUTargetMachine(const Target &T, const std::string &TT,
- const std::string &FS);
+ const std::string &CPU, const std::string &FS);
/// Return the subtarget implementation object
virtual const SPUSubtarget *getSubtargetImpl() const {
Modified: llvm/trunk/lib/Target/CppBackend/CPPTargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CppBackend/CPPTargetMachine.h?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CppBackend/CPPTargetMachine.h (original)
+++ llvm/trunk/lib/Target/CppBackend/CPPTargetMachine.h Wed Jun 29 20:53:36 2011
@@ -23,7 +23,7 @@
struct CPPTargetMachine : public TargetMachine {
CPPTargetMachine(const Target &T, const std::string &TT,
- const std::string &FS)
+ const std::string &CPU, const std::string &FS)
: TargetMachine(T) {}
virtual bool addPassesToEmitFile(PassManagerBase &PM,
Modified: llvm/trunk/lib/Target/MBlaze/AsmParser/MBlazeAsmLexer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/AsmParser/MBlazeAsmLexer.cpp?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/AsmParser/MBlazeAsmLexer.cpp (original)
+++ llvm/trunk/lib/Target/MBlaze/AsmParser/MBlazeAsmLexer.cpp Wed Jun 29 20:53:36 2011
@@ -86,8 +86,9 @@
: MBlazeBaseAsmLexer(T, MAI) {
std::string tripleString("mblaze-unknown-unknown");
std::string featureString;
+ std::string CPU;
OwningPtr<const TargetMachine>
- targetMachine(T.createTargetMachine(tripleString, featureString));
+ targetMachine(T.createTargetMachine(tripleString, CPU, featureString));
InitRegisterMap(targetMachine->getRegisterInfo());
}
};
Modified: llvm/trunk/lib/Target/MBlaze/MBlazeSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeSubtarget.cpp?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeSubtarget.cpp Wed Jun 29 20:53:36 2011
@@ -18,18 +18,22 @@
#include "llvm/Support/CommandLine.h"
using namespace llvm;
-MBlazeSubtarget::MBlazeSubtarget(const std::string &TT, const std::string &FS):
+MBlazeSubtarget::MBlazeSubtarget(const std::string &TT,
+ const std::string &CPU,
+ const std::string &FS):
HasBarrel(false), HasDiv(false), HasMul(false), HasPatCmp(false),
HasFPU(false), HasMul64(false), HasSqrt(false)
{
// Parse features string.
- std::string CPU = "mblaze";
- CPU = ParseSubtargetFeatures(FS, CPU);
+ std::string CPUName = CPU;
+ if (CPUName.empty())
+ CPUName = "mblaze";
+ ParseSubtargetFeatures(FS, CPUName);
// Only use instruction scheduling if the selected CPU has an instruction
// itinerary (the default CPU is the only one that doesn't).
- HasItin = CPU != "mblaze";
- DEBUG(dbgs() << "CPU " << CPU << "(" << HasItin << ")\n");
+ HasItin = CPUName != "mblaze";
+ DEBUG(dbgs() << "CPU " << CPUName << "(" << HasItin << ")\n");
// Compute the issue width of the MBlaze itineraries
computeIssueWidth();
Modified: llvm/trunk/lib/Target/MBlaze/MBlazeSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeSubtarget.h?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeSubtarget.h (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeSubtarget.h Wed Jun 29 20:53:36 2011
@@ -38,12 +38,12 @@
/// This constructor initializes the data members to match that
/// of the specified triple.
- MBlazeSubtarget(const std::string &TT, const std::string &FS);
+ MBlazeSubtarget(const std::string &TT, const std::string &CPU,
+ const std::string &FS);
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
- std::string ParseSubtargetFeatures(const std::string &FS,
- const std::string &CPU);
+ void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
/// Compute the number of maximum number of issues per cycle for the
/// MBlaze scheduling itineraries.
Modified: llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.cpp?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.cpp Wed Jun 29 20:53:36 2011
@@ -80,9 +80,9 @@
// an easier handling.
MBlazeTargetMachine::
MBlazeTargetMachine(const Target &T, const std::string &TT,
- const std::string &FS):
+ const std::string &CPU, const std::string &FS):
LLVMTargetMachine(T, TT),
- Subtarget(TT, FS),
+ Subtarget(TT, CPU, FS),
DataLayout("E-p:32:32:32-i8:8:8-i16:16:16"),
InstrInfo(*this),
FrameLowering(Subtarget),
Modified: llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.h?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.h (original)
+++ llvm/trunk/lib/Target/MBlaze/MBlazeTargetMachine.h Wed Jun 29 20:53:36 2011
@@ -42,7 +42,7 @@
public:
MBlazeTargetMachine(const Target &T, const std::string &TT,
- const std::string &FS);
+ const std::string &CPU, const std::string &FS);
virtual const MBlazeInstrInfo *getInstrInfo() const
{ return &InstrInfo; }
Modified: llvm/trunk/lib/Target/MSP430/MSP430Subtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430Subtarget.cpp?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MSP430/MSP430Subtarget.cpp (original)
+++ llvm/trunk/lib/Target/MSP430/MSP430Subtarget.cpp Wed Jun 29 20:53:36 2011
@@ -17,7 +17,9 @@
using namespace llvm;
-MSP430Subtarget::MSP430Subtarget(const std::string &TT, const std::string &FS) {
+MSP430Subtarget::MSP430Subtarget(const std::string &TT,
+ const std::string &CPUIgnored,
+ const std::string &FS) {
std::string CPU = "generic";
// Parse features string.
Modified: llvm/trunk/lib/Target/MSP430/MSP430Subtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430Subtarget.h?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MSP430/MSP430Subtarget.h (original)
+++ llvm/trunk/lib/Target/MSP430/MSP430Subtarget.h Wed Jun 29 20:53:36 2011
@@ -26,12 +26,12 @@
/// This constructor initializes the data members to match that
/// of the specified triple.
///
- MSP430Subtarget(const std::string &TT, const std::string &FS);
+ MSP430Subtarget(const std::string &TT, const std::string &CPU,
+ const std::string &FS);
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
- std::string ParseSubtargetFeatures(const std::string &FS,
- const std::string &CPU);
+ void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
};
} // End llvm namespace
Modified: llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.cpp?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.cpp Wed Jun 29 20:53:36 2011
@@ -28,9 +28,10 @@
MSP430TargetMachine::MSP430TargetMachine(const Target &T,
const std::string &TT,
+ const std::string &CPU,
const std::string &FS)
: LLVMTargetMachine(T, TT),
- Subtarget(TT, FS),
+ Subtarget(TT, CPU, FS),
// FIXME: Check TargetData string.
DataLayout("e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"),
InstrInfo(*this), TLInfo(*this), TSInfo(*this),
Modified: llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.h?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.h (original)
+++ llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.h Wed Jun 29 20:53:36 2011
@@ -39,7 +39,7 @@
public:
MSP430TargetMachine(const Target &T, const std::string &TT,
- const std::string &FS);
+ const std::string &CPU, const std::string &FS);
virtual const TargetFrameLowering *getFrameLowering() const {
return &FrameLowering;
Modified: llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsSubtarget.cpp Wed Jun 29 20:53:36 2011
@@ -16,18 +16,20 @@
#include "MipsGenSubtarget.inc"
using namespace llvm;
-MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &FS,
- bool little) :
+MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU,
+ const std::string &FS, bool little) :
MipsArchVersion(Mips1), MipsABI(O32), IsLittle(little), IsSingleFloat(false),
IsFP64bit(false), IsGP64bit(false), HasVFPU(false), IsLinux(true),
HasSEInReg(false), HasCondMov(false), HasMulDivAdd(false), HasMinMax(false),
HasSwap(false), HasBitCount(false)
{
- std::string CPU = "mips1";
+ std::string CPUName = CPU;
+ if (CPUName.empty())
+ CPUName = "mips1";
MipsArchVersion = Mips1;
// Parse features string.
- ParseSubtargetFeatures(FS, CPU);
+ ParseSubtargetFeatures(FS, CPUName);
// Is the target system Linux ?
if (TT.find("linux") == std::string::npos)
Modified: llvm/trunk/lib/Target/Mips/MipsSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSubtarget.h?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsSubtarget.h (original)
+++ llvm/trunk/lib/Target/Mips/MipsSubtarget.h Wed Jun 29 20:53:36 2011
@@ -91,12 +91,12 @@
/// This constructor initializes the data members to match that
/// of the specified triple.
- MipsSubtarget(const std::string &TT, const std::string &FS, bool little);
+ MipsSubtarget(const std::string &TT, const std::string &CPU,
+ const std::string &FS, bool little);
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
- std::string ParseSubtargetFeatures(const std::string &FS,
- const std::string &CPU);
+ void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
bool isMips1() const { return MipsArchVersion == Mips1; }
bool isMips32() const { return MipsArchVersion >= Mips32; }
Modified: llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp Wed Jun 29 20:53:36 2011
@@ -34,10 +34,11 @@
// an easier handling.
// Using CodeModel::Large enables different CALL behavior.
MipsTargetMachine::
-MipsTargetMachine(const Target &T, const std::string &TT, const std::string &FS,
+MipsTargetMachine(const Target &T, const std::string &TT,
+ const std::string &CPU, const std::string &FS,
bool isLittle=false):
LLVMTargetMachine(T, TT),
- Subtarget(TT, FS, isLittle),
+ Subtarget(TT, CPU, FS, isLittle),
DataLayout(isLittle ?
std::string("e-p:32:32:32-i8:8:32-i16:16:32-i64:64:64-n32") :
std::string("E-p:32:32:32-i8:8:32-i16:16:32-i64:64:64-n32")),
@@ -55,8 +56,8 @@
MipselTargetMachine::
MipselTargetMachine(const Target &T, const std::string &TT,
- const std::string &FS) :
- MipsTargetMachine(T, TT, FS, true) {}
+ const std::string &CPU, const std::string &FS) :
+ MipsTargetMachine(T, TT, CPU, FS, true) {}
// Install an instruction selector pass using
// the ISelDag to gen Mips code.
Modified: llvm/trunk/lib/Target/Mips/MipsTargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsTargetMachine.h?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsTargetMachine.h (original)
+++ llvm/trunk/lib/Target/Mips/MipsTargetMachine.h Wed Jun 29 20:53:36 2011
@@ -35,7 +35,8 @@
MipsSelectionDAGInfo TSInfo;
public:
MipsTargetMachine(const Target &T, const std::string &TT,
- const std::string &FS, bool isLittle);
+ const std::string &CPU, const std::string &FS,
+ bool isLittle);
virtual const MipsInstrInfo *getInstrInfo() const
{ return &InstrInfo; }
@@ -73,7 +74,7 @@
class MipselTargetMachine : public MipsTargetMachine {
public:
MipselTargetMachine(const Target &T, const std::string &TT,
- const std::string &FS);
+ const std::string &CPU, const std::string &FS);
};
} // End llvm namespace
Modified: llvm/trunk/lib/Target/PTX/PTXSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXSubtarget.cpp?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PTX/PTXSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/PTX/PTXSubtarget.cpp Wed Jun 29 20:53:36 2011
@@ -16,14 +16,16 @@
using namespace llvm;
-PTXSubtarget::PTXSubtarget(const std::string &TT, const std::string &FS,
- bool is64Bit)
+PTXSubtarget::PTXSubtarget(const std::string &TT, const std::string &CPU,
+ const std::string &FS, bool is64Bit)
: PTXTarget(PTX_COMPUTE_1_0),
PTXVersion(PTX_VERSION_2_0),
SupportsDouble(false),
SupportsFMA(true),
Is64Bit(is64Bit) {
- std::string TARGET = "generic";
+ std::string TARGET = CPU;
+ if (TARGET.empty())
+ TARGET = "generic";
ParseSubtargetFeatures(FS, TARGET);
}
Modified: llvm/trunk/lib/Target/PTX/PTXSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXSubtarget.h?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PTX/PTXSubtarget.h (original)
+++ llvm/trunk/lib/Target/PTX/PTXSubtarget.h Wed Jun 29 20:53:36 2011
@@ -74,7 +74,8 @@
public:
- PTXSubtarget(const std::string &TT, const std::string &FS, bool is64Bit);
+ PTXSubtarget(const std::string &TT, const std::string &CPU,
+ const std::string &FS, bool is64Bit);
// Target architecture accessors
std::string getTargetString() const;
@@ -108,8 +109,8 @@
(PTXTarget >= PTX_COMPUTE_2_0 && PTXTarget < PTX_LAST_COMPUTE);
}
- std::string ParseSubtargetFeatures(const std::string &FS,
- const std::string &CPU);
+ void ParseSubtargetFeatures(const std::string &FS,
+ const std::string &CPU);
}; // class PTXSubtarget
} // namespace llvm
Modified: llvm/trunk/lib/Target/PTX/PTXTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXTargetMachine.cpp?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PTX/PTXTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/PTX/PTXTargetMachine.cpp Wed Jun 29 20:53:36 2011
@@ -52,11 +52,12 @@
// DataLayout and FrameLowering are filled with dummy data
PTXTargetMachine::PTXTargetMachine(const Target &T,
const std::string &TT,
+ const std::string &CPU,
const std::string &FS,
bool is64Bit)
: LLVMTargetMachine(T, TT),
DataLayout(is64Bit ? DataLayout64 : DataLayout32),
- Subtarget(TT, FS, is64Bit),
+ Subtarget(TT, CPU, FS, is64Bit),
FrameLowering(Subtarget),
InstrInfo(*this),
TLInfo(*this) {
@@ -64,14 +65,16 @@
PTX32TargetMachine::PTX32TargetMachine(const Target &T,
const std::string& TT,
+ const std::string& CPU,
const std::string& FS)
- : PTXTargetMachine(T, TT, FS, false) {
+ : PTXTargetMachine(T, TT, CPU, FS, false) {
}
PTX64TargetMachine::PTX64TargetMachine(const Target &T,
const std::string& TT,
+ const std::string& CPU,
const std::string& FS)
- : PTXTargetMachine(T, TT, FS, true) {
+ : PTXTargetMachine(T, TT, CPU, FS, true) {
}
bool PTXTargetMachine::addInstSelector(PassManagerBase &PM,
Modified: llvm/trunk/lib/Target/PTX/PTXTargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXTargetMachine.h?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PTX/PTXTargetMachine.h (original)
+++ llvm/trunk/lib/Target/PTX/PTXTargetMachine.h Wed Jun 29 20:53:36 2011
@@ -33,7 +33,8 @@
public:
PTXTargetMachine(const Target &T, const std::string &TT,
- const std::string &FS, bool is64Bit);
+ const std::string &CPU, const std::string &FS,
+ bool is64Bit);
virtual const TargetData *getTargetData() const { return &DataLayout; }
@@ -61,14 +62,14 @@
public:
PTX32TargetMachine(const Target &T, const std::string &TT,
- const std::string& FS);
+ const std::string& CPU, const std::string& FS);
}; // class PTX32TargetMachine
class PTX64TargetMachine : public PTXTargetMachine {
public:
PTX64TargetMachine(const Target &T, const std::string &TT,
- const std::string& FS);
+ const std::string& CPU, const std::string& FS);
}; // class PTX32TargetMachine
} // namespace llvm
Modified: llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCSubtarget.cpp Wed Jun 29 20:53:36 2011
@@ -57,8 +57,8 @@
#endif
-PPCSubtarget::PPCSubtarget(const std::string &TT, const std::string &FS,
- bool is64Bit)
+PPCSubtarget::PPCSubtarget(const std::string &TT, const std::string &CPU,
+ const std::string &FS, bool is64Bit)
: StackAlignment(16)
, DarwinDirective(PPC::DIR_NONE)
, IsGigaProcessor(false)
@@ -73,13 +73,16 @@
, TargetTriple(TT) {
// Determine default and user specified characteristics
- std::string CPU = "generic";
+ std::string CPUName = CPU;
+ if (CPUName.empty())
+ CPUName = "generic";
#if defined(__APPLE__)
- CPU = GetCurrentPowerPCCPU();
+ if (CPUName == "generic")
+ CPUName = GetCurrentPowerPCCPU();
#endif
// Parse features string.
- ParseSubtargetFeatures(FS, CPU);
+ ParseSubtargetFeatures(FS, CPUName);
// If we are generating code for ppc64, verify that options make sense.
if (is64Bit) {
Modified: llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCSubtarget.h Wed Jun 29 20:53:36 2011
@@ -72,12 +72,12 @@
/// This constructor initializes the data members to match that
/// of the specified triple.
///
- PPCSubtarget(const std::string &TT, const std::string &FS, bool is64Bit);
+ PPCSubtarget(const std::string &TT, const std::string &CPU,
+ const std::string &FS, bool is64Bit);
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
- std::string ParseSubtargetFeatures(const std::string &FS,
- const std::string &CPU);
+ void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
/// SetJITMode - This is called to inform the subtarget info that we are
Modified: llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp Wed Jun 29 20:53:36 2011
@@ -67,9 +67,10 @@
PPCTargetMachine::PPCTargetMachine(const Target &T, const std::string &TT,
+ const std::string &CPU,
const std::string &FS, bool is64Bit)
: LLVMTargetMachine(T, TT),
- Subtarget(TT, FS, is64Bit),
+ Subtarget(TT, CPU, FS, is64Bit),
DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this),
FrameLowering(Subtarget), JITInfo(*this, is64Bit),
TLInfo(*this), TSInfo(*this),
@@ -88,14 +89,16 @@
bool PPCTargetMachine::getEnableTailMergeDefault() const { return false; }
PPC32TargetMachine::PPC32TargetMachine(const Target &T, const std::string &TT,
+ const std::string &CPU,
const std::string &FS)
- : PPCTargetMachine(T, TT, FS, false) {
+ : PPCTargetMachine(T, TT, CPU, FS, false) {
}
PPC64TargetMachine::PPC64TargetMachine(const Target &T, const std::string &TT,
+ const std::string &CPU,
const std::string &FS)
- : PPCTargetMachine(T, TT, FS, true) {
+ : PPCTargetMachine(T, TT, CPU, FS, true) {
}
Modified: llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h Wed Jun 29 20:53:36 2011
@@ -41,7 +41,8 @@
public:
PPCTargetMachine(const Target &T, const std::string &TT,
- const std::string &FS, bool is64Bit);
+ const std::string &CPU, const std::string &FS,
+ bool is64Bit);
virtual const PPCInstrInfo *getInstrInfo() const { return &InstrInfo; }
virtual const PPCFrameLowering *getFrameLowering() const {
@@ -77,7 +78,7 @@
class PPC32TargetMachine : public PPCTargetMachine {
public:
PPC32TargetMachine(const Target &T, const std::string &TT,
- const std::string &FS);
+ const std::string &CPU, const std::string &FS);
};
/// PPC64TargetMachine - PowerPC 64-bit target machine.
@@ -85,7 +86,7 @@
class PPC64TargetMachine : public PPCTargetMachine {
public:
PPC64TargetMachine(const Target &T, const std::string &TT,
- const std::string &FS);
+ const std::string &CPU, const std::string &FS);
};
} // end namespace llvm
Modified: llvm/trunk/lib/Target/Sparc/SparcSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcSubtarget.cpp?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/SparcSubtarget.cpp Wed Jun 29 20:53:36 2011
@@ -15,20 +15,23 @@
#include "SparcGenSubtarget.inc"
using namespace llvm;
-SparcSubtarget::SparcSubtarget(const std::string &TT, const std::string &FS,
- bool is64Bit) :
+SparcSubtarget::SparcSubtarget(const std::string &TT, const std::string &CPU,
+ const std::string &FS, bool is64Bit) :
IsV9(false),
V8DeprecatedInsts(false),
IsVIS(false),
Is64Bit(is64Bit) {
// Determine default and user specified characteristics
- const char *CPU = "v8";
- if (is64Bit) {
- CPU = "v9";
- IsV9 = true;
+ std::string CPUName = CPU;
+ if (CPUName.empty()) {
+ if (is64Bit)
+ CPUName = "v9";
+ else
+ CPUName = "v8";
}
+ IsV9 = CPUName == "v9";
// Parse features string.
- ParseSubtargetFeatures(FS, CPU);
+ ParseSubtargetFeatures(FS, CPUName);
}
Modified: llvm/trunk/lib/Target/Sparc/SparcSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcSubtarget.h?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcSubtarget.h (original)
+++ llvm/trunk/lib/Target/Sparc/SparcSubtarget.h Wed Jun 29 20:53:36 2011
@@ -26,7 +26,8 @@
bool Is64Bit;
public:
- SparcSubtarget(const std::string &TT, const std::string &FS, bool is64bit);
+ SparcSubtarget(const std::string &TT, const std::string &CPU,
+ const std::string &FS, bool is64bit);
bool isV9() const { return IsV9; }
bool isVIS() const { return IsVIS; }
@@ -34,8 +35,7 @@
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
- std::string ParseSubtargetFeatures(const std::string &FS,
- const std::string &CPU);
+ void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
bool is64Bit() const { return Is64Bit; }
std::string getDataLayout() const {
Modified: llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp Wed Jun 29 20:53:36 2011
@@ -30,9 +30,10 @@
/// SparcTargetMachine ctor - Create an ILP32 architecture model
///
SparcTargetMachine::SparcTargetMachine(const Target &T, const std::string &TT,
+ const std::string &CPU,
const std::string &FS, bool is64bit)
: LLVMTargetMachine(T, TT),
- Subtarget(TT, FS, is64bit),
+ Subtarget(TT, CPU, FS, is64bit),
DataLayout(Subtarget.getDataLayout()),
TLInfo(*this), TSInfo(*this), InstrInfo(Subtarget),
FrameLowering(Subtarget) {
@@ -56,12 +57,14 @@
SparcV8TargetMachine::SparcV8TargetMachine(const Target &T,
const std::string &TT,
+ const std::string &CPU,
const std::string &FS)
- : SparcTargetMachine(T, TT, FS, false) {
+ : SparcTargetMachine(T, TT, CPU, FS, false) {
}
SparcV9TargetMachine::SparcV9TargetMachine(const Target &T,
const std::string &TT,
+ const std::string &CPU,
const std::string &FS)
- : SparcTargetMachine(T, TT, FS, true) {
+ : SparcTargetMachine(T, TT, CPU, FS, true) {
}
Modified: llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h (original)
+++ llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h Wed Jun 29 20:53:36 2011
@@ -34,7 +34,8 @@
SparcFrameLowering FrameLowering;
public:
SparcTargetMachine(const Target &T, const std::string &TT,
- const std::string &FS, bool is64bit);
+ const std::string &CPU, const std::string &FS,
+ bool is64bit);
virtual const SparcInstrInfo *getInstrInfo() const { return &InstrInfo; }
virtual const TargetFrameLowering *getFrameLowering() const {
@@ -62,7 +63,7 @@
class SparcV8TargetMachine : public SparcTargetMachine {
public:
SparcV8TargetMachine(const Target &T, const std::string &TT,
- const std::string &FS);
+ const std::string &CPU, const std::string &FS);
};
/// SparcV9TargetMachine - Sparc 64-bit target machine
@@ -70,7 +71,7 @@
class SparcV9TargetMachine : public SparcTargetMachine {
public:
SparcV9TargetMachine(const Target &T, const std::string &TT,
- const std::string &FS);
+ const std::string &CPU, const std::string &FS);
};
} // end namespace llvm
Modified: llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.cpp?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.cpp Wed Jun 29 20:53:36 2011
@@ -20,12 +20,15 @@
using namespace llvm;
SystemZSubtarget::SystemZSubtarget(const std::string &TT,
+ const std::string &CPU,
const std::string &FS):
HasZ10Insts(false) {
- std::string CPU = "z9";
+ std::string CPUName = CPU;
+ if (CPUName.empty())
+ CPUName = "z9";
// Parse features string.
- ParseSubtargetFeatures(FS, CPU);
+ ParseSubtargetFeatures(FS, CPUName);
}
/// True if accessing the GV requires an extra load.
Modified: llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.h?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.h (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.h Wed Jun 29 20:53:36 2011
@@ -28,12 +28,12 @@
/// This constructor initializes the data members to match that
/// of the specified triple.
///
- SystemZSubtarget(const std::string &TT, const std::string &FS);
+ SystemZSubtarget(const std::string &TT, const std::string &CPU,
+ const std::string &FS);
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
- std::string ParseSubtargetFeatures(const std::string &FS,
- const std::string &CPU);
+ void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
bool isZ10() const { return HasZ10Insts; }
Modified: llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.cpp?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.cpp Wed Jun 29 20:53:36 2011
@@ -24,9 +24,10 @@
///
SystemZTargetMachine::SystemZTargetMachine(const Target &T,
const std::string &TT,
+ const std::string &CPU,
const std::string &FS)
: LLVMTargetMachine(T, TT),
- Subtarget(TT, FS),
+ Subtarget(TT, CPU, FS),
DataLayout("E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-i64:64:64-f32:32:32"
"-f64:64:64-f128:128:128-a0:16:16-n32:64"),
InstrInfo(*this), TLInfo(*this), TSInfo(*this),
Modified: llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.h?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.h (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.h Wed Jun 29 20:53:36 2011
@@ -38,7 +38,7 @@
SystemZFrameLowering FrameLowering;
public:
SystemZTargetMachine(const Target &T, const std::string &TT,
- const std::string &FS);
+ const std::string &CPU, const std::string &FS);
virtual const TargetFrameLowering *getFrameLowering() const {
return &FrameLowering;
Modified: llvm/trunk/lib/Target/X86/X86Subtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Subtarget.cpp?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86Subtarget.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86Subtarget.cpp Wed Jun 29 20:53:36 2011
@@ -284,7 +284,8 @@
}
}
-X86Subtarget::X86Subtarget(const std::string &TT, const std::string &FS,
+X86Subtarget::X86Subtarget(const std::string &TT, const std::string &CPU,
+ const std::string &FS,
bool is64Bit, unsigned StackAlignOverride)
: PICStyle(PICStyles::None)
, X86SSELevel(NoMMXSSE)
@@ -308,10 +309,12 @@
, Is64Bit(is64Bit) {
// Determine default and user specified characteristics
- if (!FS.empty()) {
+ if (!CPU.empty() || !FS.empty()) {
// If feature string is not empty, parse features string.
- std::string CPU = sys::getHostCPUName();
- ParseSubtargetFeatures(FS, CPU);
+ std::string CPUName = CPU;
+ if (CPUName.empty())
+ CPUName = sys::getHostCPUName();
+ ParseSubtargetFeatures(FS, CPUName);
// All X86-64 CPUs also have SSE2, however user might request no SSE via
// -mattr, so don't force SSELevel here.
if (HasAVX)
Modified: llvm/trunk/lib/Target/X86/X86Subtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Subtarget.h?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86Subtarget.h (original)
+++ llvm/trunk/lib/Target/X86/X86Subtarget.h Wed Jun 29 20:53:36 2011
@@ -117,7 +117,8 @@
/// This constructor initializes the data members to match that
/// of the specified triple.
///
- X86Subtarget(const std::string &TT, const std::string &FS, bool is64Bit,
+ X86Subtarget(const std::string &TT, const std::string &CPU,
+ const std::string &FS, bool is64Bit,
unsigned StackAlignOverride);
/// getStackAlignment - Returns the minimum alignment known to hold of the
@@ -131,8 +132,7 @@
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
- std::string ParseSubtargetFeatures(const std::string &FS,
- const std::string &CPU);
+ void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
/// AutoDetectSubtargetFeatures - Auto-detect CPU features using CPUID
/// instruction.
Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.cpp?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetMachine.cpp Wed Jun 29 20:53:36 2011
@@ -87,8 +87,9 @@
X86_32TargetMachine::X86_32TargetMachine(const Target &T, const std::string &TT,
+ const std::string &CPU,
const std::string &FS)
- : X86TargetMachine(T, TT, FS, false),
+ : X86TargetMachine(T, TT, CPU, FS, false),
DataLayout(getSubtargetImpl()->isTargetDarwin() ?
"e-p:32:32-f64:32:64-i64:32:64-f80:128:128-f128:128:128-n8:16:32" :
(getSubtargetImpl()->isTargetCygMing() ||
@@ -103,8 +104,9 @@
X86_64TargetMachine::X86_64TargetMachine(const Target &T, const std::string &TT,
+ const std::string &CPU,
const std::string &FS)
- : X86TargetMachine(T, TT, FS, true),
+ : X86TargetMachine(T, TT, CPU, FS, true),
DataLayout("e-p:64:64-s:64-f64:64:64-i64:64:64-f80:128:128-f128:128:128-n8:16:32:64"),
InstrInfo(*this),
TSInfo(*this),
@@ -115,9 +117,10 @@
/// X86TargetMachine ctor - Create an X86 target.
///
X86TargetMachine::X86TargetMachine(const Target &T, const std::string &TT,
+ const std::string &CPU,
const std::string &FS, bool is64Bit)
: LLVMTargetMachine(T, TT),
- Subtarget(TT, FS, is64Bit, StackAlignmentOverride),
+ Subtarget(TT, CPU, FS, is64Bit, StackAlignmentOverride),
FrameLowering(*this, Subtarget),
ELFWriterInfo(is64Bit, true) {
DefRelocModel = getRelocationModel();
Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.h?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetMachine.h (original)
+++ llvm/trunk/lib/Target/X86/X86TargetMachine.h Wed Jun 29 20:53:36 2011
@@ -43,7 +43,8 @@
public:
X86TargetMachine(const Target &T, const std::string &TT,
- const std::string &FS, bool is64Bit);
+ const std::string &CPU, const std::string &FS,
+ bool is64Bit);
virtual const X86InstrInfo *getInstrInfo() const {
llvm_unreachable("getInstrInfo not implemented");
@@ -87,7 +88,7 @@
X86JITInfo JITInfo;
public:
X86_32TargetMachine(const Target &T, const std::string &M,
- const std::string &FS);
+ const std::string &CPU, const std::string &FS);
virtual const TargetData *getTargetData() const { return &DataLayout; }
virtual const X86TargetLowering *getTargetLowering() const {
return &TLInfo;
@@ -113,7 +114,7 @@
X86JITInfo JITInfo;
public:
X86_64TargetMachine(const Target &T, const std::string &TT,
- const std::string &FS);
+ const std::string &CPU, const std::string &FS);
virtual const TargetData *getTargetData() const { return &DataLayout; }
virtual const X86TargetLowering *getTargetLowering() const {
return &TLInfo;
Modified: llvm/trunk/lib/Target/XCore/XCoreSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreSubtarget.cpp?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/XCore/XCoreSubtarget.cpp Wed Jun 29 20:53:36 2011
@@ -15,6 +15,7 @@
#include "XCore.h"
using namespace llvm;
-XCoreSubtarget::XCoreSubtarget(const std::string &TT, const std::string &FS)
+XCoreSubtarget::XCoreSubtarget(const std::string &TT,
+ const std::string &CPU, const std::string &FS)
{
}
Modified: llvm/trunk/lib/Target/XCore/XCoreSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreSubtarget.h?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreSubtarget.h (original)
+++ llvm/trunk/lib/Target/XCore/XCoreSubtarget.h Wed Jun 29 20:53:36 2011
@@ -27,12 +27,12 @@
/// This constructor initializes the data members to match that
/// of the specified triple.
///
- XCoreSubtarget(const std::string &TT, const std::string &FS);
+ XCoreSubtarget(const std::string &TT, const std::string &CPU,
+ const std::string &FS);
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
- std::string ParseSubtargetFeatures(const std::string &FS,
- const std::string &CPU);
+ void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
};
} // End llvm namespace
Modified: llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp Wed Jun 29 20:53:36 2011
@@ -21,9 +21,10 @@
/// XCoreTargetMachine ctor - Create an ILP32 architecture model
///
XCoreTargetMachine::XCoreTargetMachine(const Target &T, const std::string &TT,
+ const std::string &CPU,
const std::string &FS)
: LLVMTargetMachine(T, TT),
- Subtarget(TT, FS),
+ Subtarget(TT, CPU, FS),
DataLayout("e-p:32:32:32-a0:0:32-f32:32:32-f64:32:32-i1:8:32-i8:8:32-"
"i16:16:32-i32:32:32-i64:32:32-n32"),
InstrInfo(),
Modified: llvm/trunk/lib/Target/XCore/XCoreTargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreTargetMachine.h?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreTargetMachine.h (original)
+++ llvm/trunk/lib/Target/XCore/XCoreTargetMachine.h Wed Jun 29 20:53:36 2011
@@ -33,7 +33,7 @@
XCoreSelectionDAGInfo TSInfo;
public:
XCoreTargetMachine(const Target &T, const std::string &TT,
- const std::string &FS);
+ const std::string &CPU, const std::string &FS);
virtual const XCoreInstrInfo *getInstrInfo() const { return &InstrInfo; }
virtual const XCoreFrameLowering *getFrameLowering() const {
Modified: llvm/trunk/tools/llc/llc.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llc/llc.cpp?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/tools/llc/llc.cpp (original)
+++ llvm/trunk/tools/llc/llc.cpp Wed Jun 29 20:53:36 2011
@@ -261,16 +261,16 @@
// Package up features to be passed to target/subtarget
std::string FeaturesStr;
- if (MCPU.size() || MAttrs.size()) {
+ if (MAttrs.size()) {
SubtargetFeatures Features;
- Features.setCPU(MCPU);
for (unsigned i = 0; i != MAttrs.size(); ++i)
Features.AddFeature(MAttrs[i]);
FeaturesStr = Features.getString();
}
std::auto_ptr<TargetMachine>
- target(TheTarget->createTargetMachine(TheTriple.getTriple(), FeaturesStr));
+ target(TheTarget->createTargetMachine(TheTriple.getTriple(), MCPU,
+ FeaturesStr));
assert(target.get() && "Could not allocate target machine!");
TargetMachine &Target = *target.get();
Modified: llvm/trunk/tools/llvm-mc/llvm-mc.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/llvm-mc.cpp?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/tools/llvm-mc/llvm-mc.cpp (original)
+++ llvm/trunk/tools/llvm-mc/llvm-mc.cpp Wed Jun 29 20:53:36 2011
@@ -309,17 +309,13 @@
// Package up features to be passed to target/subtarget
std::string FeaturesStr;
- if (MCPU.size()) {
- SubtargetFeatures Features;
- Features.setCPU(MCPU);
- FeaturesStr = Features.getString();
- }
// FIXME: We shouldn't need to do this (and link in codegen).
// When we split this out, we should do it in a way that makes
// it straightforward to switch subtargets on the fly (.e.g,
// the .cpu and .code16 directives).
OwningPtr<TargetMachine> TM(TheTarget->createTargetMachine(TripleName,
+ MCPU,
FeaturesStr));
if (!TM) {
@@ -415,17 +411,13 @@
} else {
// Package up features to be passed to target/subtarget
std::string FeaturesStr;
- if (MCPU.size()) {
- SubtargetFeatures Features;
- Features.setCPU(MCPU);
- FeaturesStr = Features.getString();
- }
// FIXME: We shouldn't need to do this (and link in codegen).
// When we split this out, we should do it in a way that makes
// it straightforward to switch subtargets on the fly (.e.g,
// the .cpu and .code16 directives).
OwningPtr<TargetMachine> TM(TheTarget->createTargetMachine(TripleName,
+ MCPU,
FeaturesStr));
if (!TM) {
Modified: llvm/trunk/tools/llvm-objdump/llvm-objdump.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-objdump/llvm-objdump.cpp?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/tools/llvm-objdump/llvm-objdump.cpp (original)
+++ llvm/trunk/tools/llvm-objdump/llvm-objdump.cpp Wed Jun 29 20:53:36 2011
@@ -201,7 +201,8 @@
// it straightforward to switch subtargets on the fly (.e.g,
// the .cpu and .code16 directives).
std::string FeaturesStr;
- OwningPtr<TargetMachine> TM(TheTarget->createTargetMachine(TripleName,
+ std::string CPU;
+ OwningPtr<TargetMachine> TM(TheTarget->createTargetMachine(TripleName, CPU,
FeaturesStr));
if (!TM) {
errs() << "error: could not create target for triple " << TripleName << "\n";
Modified: llvm/trunk/tools/lto/LTOCodeGenerator.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto/LTOCodeGenerator.cpp?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/tools/lto/LTOCodeGenerator.cpp (original)
+++ llvm/trunk/tools/lto/LTOCodeGenerator.cpp Wed Jun 29 20:53:36 2011
@@ -262,9 +262,9 @@
// construct LTModule, hand over ownership of module and target
SubtargetFeatures Features;
- Features.getDefaultSubtargetFeatures(_mCpu, llvm::Triple(Triple));
+ Features.getDefaultSubtargetFeatures(llvm::Triple(Triple));
std::string FeatureStr = Features.getString();
- _target = march->createTargetMachine(Triple, FeatureStr);
+ _target = march->createTargetMachine(Triple, _mCpu, FeatureStr);
}
return false;
}
Modified: llvm/trunk/tools/lto/LTOModule.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/lto/LTOModule.cpp?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/tools/lto/LTOModule.cpp (original)
+++ llvm/trunk/tools/lto/LTOModule.cpp Wed Jun 29 20:53:36 2011
@@ -157,9 +157,10 @@
// construct LTOModule, hand over ownership of module and target
SubtargetFeatures Features;
- Features.getDefaultSubtargetFeatures("" /* cpu */, llvm::Triple(Triple));
+ Features.getDefaultSubtargetFeatures(llvm::Triple(Triple));
std::string FeatureStr = Features.getString();
- TargetMachine *target = march->createTargetMachine(Triple, FeatureStr);
+ std::string CPU;
+ TargetMachine *target = march->createTargetMachine(Triple, CPU, FeatureStr);
LTOModule *Ret = new LTOModule(m.take(), target);
bool Err = Ret->ParseSymbols();
if (Err) {
Modified: llvm/trunk/utils/TableGen/SubtargetEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/SubtargetEmitter.cpp?rev=134127&r1=134126&r2=134127&view=diff
==============================================================================
--- llvm/trunk/utils/TableGen/SubtargetEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/SubtargetEmitter.cpp Wed Jun 29 20:53:36 2011
@@ -606,15 +606,15 @@
OS << "// ParseSubtargetFeatures - Parses features string setting specified\n"
<< "// subtarget options.\n"
- << "std::string llvm::";
+ << "void llvm::";
OS << Target;
OS << "Subtarget::ParseSubtargetFeatures(const std::string &FS,\n"
<< " const std::string &CPU) {\n"
<< " DEBUG(dbgs() << \"\\nFeatures:\" << FS);\n"
<< " DEBUG(dbgs() << \"\\nCPU:\" << CPU);\n"
<< " SubtargetFeatures Features(FS);\n"
- << " Features.setCPUIfNone(CPU);\n"
- << " uint64_t Bits = Features.getBits(SubTypeKV, SubTypeKVSize,\n"
+ << " uint64_t Bits = Features.getFeatureBits(CPU, "
+ << "SubTypeKV, SubTypeKVSize,\n"
<< " FeatureKV, FeatureKVSize);\n";
for (unsigned i = 0; i < Features.size(); i++) {
@@ -635,13 +635,13 @@
if (HasItineraries) {
OS << "\n"
<< " InstrItinerary *Itinerary = (InstrItinerary *)"
- << "Features.getInfo(ProcItinKV, ProcItinKVSize);\n"
+ << "Features.getItinerary(CPU, "
+ << "ProcItinKV, ProcItinKVSize);\n"
<< " InstrItins = InstrItineraryData(Stages, OperandCycles, "
<< "ForwardingPathes, Itinerary);\n";
}
- OS << " return Features.getCPU();\n"
- << "}\n";
+ OS << "}\n";
}
//
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