[llvm-commits] [llvm] r133803 - in /llvm/trunk: lib/Target/Mips/MipsISelDAGToDAG.cpp test/CodeGen/Mips/2008-07-15-SmallSection.ll test/CodeGen/Mips/internalfunc.ll test/CodeGen/Mips/o32_cc_byval.ll

[Akira Hatanaka]

Author: ahatanak
Date: Fri Jun 24 12:55:19 2011
New Revision: 133803

URL: http://llvm.org/viewvc/llvm-project?rev=133803&view=rev
Log:
Prevent generation of redundant addiu instructions that compute address of 
static variables or functions. 



Modified:
    llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp
    llvm/trunk/test/CodeGen/Mips/2008-07-15-SmallSection.ll
    llvm/trunk/test/CodeGen/Mips/internalfunc.ll
    llvm/trunk/test/CodeGen/Mips/o32_cc_byval.ll

Modified: llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp?rev=133803&r1=133802&r2=133803&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsISelDAGToDAG.cpp Fri Jun 24 12:55:19 2011
@@ -170,7 +170,8 @@
          Addr.getOperand(0).getOpcode() == ISD::LOAD) &&
         Addr.getOperand(1).getOpcode() == MipsISD::Lo) {
       SDValue LoVal = Addr.getOperand(1);
-      if (dyn_cast<ConstantPoolSDNode>(LoVal.getOperand(0))) {
+      if (isa<ConstantPoolSDNode>(LoVal.getOperand(0)) || 
+          isa<GlobalAddressSDNode>(LoVal.getOperand(0))) {
         Base = Addr.getOperand(0);
         Offset = LoVal.getOperand(0);
         return true;

Modified: llvm/trunk/test/CodeGen/Mips/2008-07-15-SmallSection.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/2008-07-15-SmallSection.ll?rev=133803&r1=133802&r2=133803&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/2008-07-15-SmallSection.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/2008-07-15-SmallSection.ll Fri Jun 24 12:55:19 2011
@@ -7,7 +7,7 @@
 ; RUN: not grep {sbss} %t1 
 ; RUN: not grep {gp_rel} %t1
 ; RUN: grep {\%hi} %t1 | count 2
-; RUN: grep {\%lo} %t1 | count 2
+; RUN: grep {\%lo} %t1 | count 3
 
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
 target triple = "mipsallegrexel-unknown-psp-elf"

Modified: llvm/trunk/test/CodeGen/Mips/internalfunc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/internalfunc.ll?rev=133803&r1=133802&r2=133803&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/internalfunc.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/internalfunc.ll Fri Jun 24 12:55:19 2011
@@ -15,7 +15,7 @@
 define void @caller(i32 %a0, i32 %a1) nounwind {
 entry:
 ; CHECK: lw  $[[R1:[0-9]+]], %got(caller.sf1)($gp)
-; CHECK: addiu ${{[0-9]+}}, $[[R1]], %lo(caller.sf1)
+; CHECK: lw  $25, %lo(caller.sf1)($[[R1]])
   %tobool = icmp eq i32 %a1, 0
   br i1 %tobool, label %if.end, label %if.then
 
@@ -26,9 +26,9 @@
 
 if.end:                                           ; preds = %entry, %if.then
 ; CHECK: lw  $[[R2:[0-9]+]], %got(sf2)($gp)
-; CHECK: lw  $[[R3:[0-9]+]], %got(caller.sf1)($gp)
 ; CHECK: addiu ${{[0-9]+}}, $[[R2]], %lo(sf2)
-; CHECK: addiu ${{[0-9]+}}, $[[R3]], %lo(caller.sf1)
+; CHECK: lw  $[[R3:[0-9]+]], %got(caller.sf1)($gp)
+; CHECK: sw  ${{[0-9]+}}, %lo(caller.sf1)($[[R3]])
   %tobool3 = icmp ne i32 %a0, 0
   %tmp4 = load void (...)** @gf1, align 4
   %cond = select i1 %tobool3, void (...)* %tmp4, void (...)* bitcast (void ()* @sf2 to void (...)*)

Modified: llvm/trunk/test/CodeGen/Mips/o32_cc_byval.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/o32_cc_byval.ll?rev=133803&r1=133802&r2=133803&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/o32_cc_byval.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/o32_cc_byval.ll Fri Jun 24 12:55:19 2011
@@ -24,7 +24,7 @@
 ; CHECK: sw  $[[R4]], 28($sp)
 ; CHECK: sw  $[[R5]], 32($sp)
 ; CHECK: sw  $[[R6]], 36($sp)
-; CHECK: lw  $6, 0($[[R0]])
+; CHECK: lw  $6, %lo(f1.s1)($[[R1]])
 ; CHECK: lw  $7, 4($[[R0]])
   %agg.tmp10 = alloca %struct.S3, align 4
   call void @callee1(float 2.000000e+01, %struct.S1* byval bitcast (%0* @f1.s1 to %struct.S1*)) nounwind