[llvm-commits] [llvm] r133782 - in /llvm/trunk: ./ include/llvm/MC/ include/llvm/Target/ lib/CodeGen/ lib/Target/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/Blackfin/ lib/Target/CellSPU/ lib/Target/MBlaze/ lib/Target/MSP430/ lib/Target/Mips/ lib/Target/PTX/ lib/Target/PowerPC/ lib/Target/Sparc/ lib/Target/SystemZ/ lib/Target/X86/ lib/Target/X86/TargetDesc/ lib/Target/XCore/ utils/TableGen/

[Sean Hunt]

On 06/23/11 18:44, Evan Cheng wrote:
> Author: evancheng
> Date: Thu Jun 23 20:44:41 2011
> New Revision: 133782
>
> URL: http://llvm.org/viewvc/llvm-project?rev=133782&view=rev
> Log:
> Starting to refactor Target to separate out code that's needed to fully describe
> target machine from those that are only needed by codegen. The goal is to
> sink the essential target description into MC layer so we can start building
> MC based tools without needing to link in the entire codegen.
>
> First step is to refactor TargetRegisterInfo. This patch added a base class
> MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to
> separate register description from the rest of the stuff.

Can you please update lib/Target/CellSPU/CMakeLists.txt?

Thanks,
Sean