[llvm-commits] [llvm] r133599 - in /llvm/trunk: lib/Target/PTX/PTXInstrInfo.td test/CodeGen/PTX/setp.ll

[Justin Holewinski]

Author: jholewinski
Date: Tue Jun 21 21:09:50 2011
New Revision: 133599

URL: http://llvm.org/viewvc/llvm-project?rev=133599&view=rev
Log:
PTX: Add signed integer comparisons

Modified:
    llvm/trunk/lib/Target/PTX/PTXInstrInfo.td
    llvm/trunk/test/CodeGen/PTX/setp.ll

Modified: llvm/trunk/lib/Target/PTX/PTXInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PTX/PTXInstrInfo.td?rev=133599&r1=133598&r2=133599&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PTX/PTXInstrInfo.td (original)
+++ llvm/trunk/lib/Target/PTX/PTXInstrInfo.td Tue Jun 21 21:09:50 2011
@@ -696,6 +696,10 @@
 defm SETPLEu16 : PTX_SETP_I<RegI16, "u16", i16imm, SETULE, "le">;
 defm SETPGTu16 : PTX_SETP_I<RegI16, "u16", i16imm, SETUGT, "gt">;
 defm SETPGEu16 : PTX_SETP_I<RegI16, "u16", i16imm, SETUGE, "ge">;
+defm SETPLTs16 : PTX_SETP_I<RegI16, "s16", i16imm, SETLT,  "lt">;
+defm SETPLEs16 : PTX_SETP_I<RegI16, "s16", i16imm, SETLE,  "le">;
+defm SETPGTs16 : PTX_SETP_I<RegI16, "s16", i16imm, SETGT,  "gt">;
+defm SETPGEs16 : PTX_SETP_I<RegI16, "s16", i16imm, SETGE,  "ge">;
 
 // Compare u32
 
@@ -705,6 +709,10 @@
 defm SETPLEu32 : PTX_SETP_I<RegI32, "u32", i32imm, SETULE, "le">;
 defm SETPGTu32 : PTX_SETP_I<RegI32, "u32", i32imm, SETUGT, "gt">;
 defm SETPGEu32 : PTX_SETP_I<RegI32, "u32", i32imm, SETUGE, "ge">;
+defm SETPLTs32 : PTX_SETP_I<RegI32, "s32", i32imm, SETLT,  "lt">;
+defm SETPLEs32 : PTX_SETP_I<RegI32, "s32", i32imm, SETLE,  "le">;
+defm SETPGTs32 : PTX_SETP_I<RegI32, "s32", i32imm, SETGT,  "gt">;
+defm SETPGEs32 : PTX_SETP_I<RegI32, "s32", i32imm, SETGE,  "ge">;
 
 // Compare u64
 
@@ -714,6 +722,10 @@
 defm SETPLEu64 : PTX_SETP_I<RegI64, "u64", i64imm, SETULE, "le">;
 defm SETPGTu64 : PTX_SETP_I<RegI64, "u64", i64imm, SETUGT, "gt">;
 defm SETPGEu64 : PTX_SETP_I<RegI64, "u64", i64imm, SETUGE, "ge">;
+defm SETPLTs64 : PTX_SETP_I<RegI64, "s64", i64imm, SETLT,  "lt">;
+defm SETPLEs64 : PTX_SETP_I<RegI64, "s64", i64imm, SETLE,  "le">;
+defm SETPGTs64 : PTX_SETP_I<RegI64, "s64", i64imm, SETGT,  "gt">;
+defm SETPGEs64 : PTX_SETP_I<RegI64, "s64", i64imm, SETGE,  "ge">;
 
 // Compare f32
 

Modified: llvm/trunk/test/CodeGen/PTX/setp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PTX/setp.ll?rev=133599&r1=133598&r2=133599&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PTX/setp.ll (original)
+++ llvm/trunk/test/CodeGen/PTX/setp.ll Tue Jun 21 21:09:50 2011
@@ -54,6 +54,42 @@
 	ret i32 %z
 }
 
+define ptx_device i32 @test_setp_lt_s32_rr(i32 %x, i32 %y) {
+; CHECK: setp.lt.s32 p0, r1, r2;
+; CHECK-NEXT: selp.u32 r0, 1, 0, p0;
+; CHECK-NEXT: ret;
+	%p = icmp slt i32 %x, %y
+	%z = zext i1 %p to i32
+	ret i32 %z
+}
+
+define ptx_device i32 @test_setp_le_s32_rr(i32 %x, i32 %y) {
+; CHECK: setp.le.s32 p0, r1, r2;
+; CHECK-NEXT: selp.u32 r0, 1, 0, p0;
+; CHECK-NEXT: ret;
+	%p = icmp sle i32 %x, %y
+	%z = zext i1 %p to i32
+	ret i32 %z
+}
+
+define ptx_device i32 @test_setp_gt_s32_rr(i32 %x, i32 %y) {
+; CHECK: setp.gt.s32 p0, r1, r2;
+; CHECK-NEXT: selp.u32 r0, 1, 0, p0;
+; CHECK-NEXT: ret;
+	%p = icmp sgt i32 %x, %y
+	%z = zext i1 %p to i32
+	ret i32 %z
+}
+
+define ptx_device i32 @test_setp_ge_s32_rr(i32 %x, i32 %y) {
+; CHECK: setp.ge.s32 p0, r1, r2;
+; CHECK-NEXT: selp.u32 r0, 1, 0, p0;
+; CHECK-NEXT: ret;
+	%p = icmp sge i32 %x, %y
+	%z = zext i1 %p to i32
+	ret i32 %z
+}
+
 define ptx_device i32 @test_setp_eq_u32_ri(i32 %x) {
 ; CHECK: setp.eq.u32 p0, r1, 1;
 ; CHECK-NEXT: selp.u32 r0, 1, 0, p0;
@@ -108,6 +144,42 @@
 	ret i32 %z
 }
 
+define ptx_device i32 @test_setp_lt_s32_ri(i32 %x) {
+; CHECK: setp.lt.s32 p0, r1, 1;
+; CHECK-NEXT: selp.u32 r0, 1, 0, p0;
+; CHECK-NEXT: ret;
+	%p = icmp slt i32 %x, 1
+	%z = zext i1 %p to i32
+	ret i32 %z
+}
+
+define ptx_device i32 @test_setp_le_s32_ri(i32 %x) {
+; CHECK: setp.lt.s32 p0, r1, 2;
+; CHECK-NEXT: selp.u32 r0, 1, 0, p0;
+; CHECK-NEXT: ret;
+	%p = icmp sle i32 %x, 1
+	%z = zext i1 %p to i32
+	ret i32 %z
+}
+
+define ptx_device i32 @test_setp_gt_s32_ri(i32 %x) {
+; CHECK: setp.gt.s32 p0, r1, 1;
+; CHECK-NEXT: selp.u32 r0, 1, 0, p0;
+; CHECK-NEXT: ret;
+	%p = icmp sgt i32 %x, 1
+	%z = zext i1 %p to i32
+	ret i32 %z
+}
+
+define ptx_device i32 @test_setp_ge_s32_ri(i32 %x) {
+; CHECK: setp.gt.s32 p0, r1, 0;
+; CHECK-NEXT: selp.u32 r0, 1, 0, p0;
+; CHECK-NEXT: ret;
+	%p = icmp sge i32 %x, 1
+	%z = zext i1 %p to i32
+	ret i32 %z
+}
+
 define ptx_device i32 @test_setp_4_op_format_1(i32 %x, i32 %y, i32 %u, i32 %v) {
 ; CHECK: setp.gt.u32 p0, r3, r4;
 ; CHECK-NEXT: setp.eq.and.u32 p0, r1, r2, p0;