[llvm-commits] [llvm] r133022 - in /llvm/trunk: lib/CodeGen/SelectionDAG/DAGCombiner.cpp test/CodeGen/X86/shl_undef.ll

[Chris Lattner]

On Jun 15, 2011, at 9:39 AM, Chad Rosier wrote:

>> 
>> x86 isel matches "shl undef, 1" to "add undef, undef" but then two different registers are used for the two undef operands, and the result is that the lsb is _not_ zero.
>> 
>> I think Chad's fix is a good solution.  Otherwise, if we really want to assert that any operation with an undef input has an undef result, then SimplifyDemandedBits will have to do something more complicated than just inserting undefs as it does in the code above.
>> 
>> BTW, Chad, regarding the comment in your testcase, TargetLoweringOpt is not a pass.  It's just a struct to hold some information used by optimizations in the DAG combiner.
>> 
> 
> Ah, yes.  Thanks for the clarification.

I agree that Chad's fix is the right way to go.

> How do you suggest rewriting the following pattern so it is safe?
> 
> def : Pat<(shl GR32:$src1, (i8 1)), (ADD32rr GR32:$src1, GR32:$src1)>;


Is this a real problem?  We don't do any undef processing after machineinstrs are formed.

-Chris
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