[llvm-commits] [llvm] r132984 - /llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

[Nadav Rotem]

Author: nadav
Date: Tue Jun 14 02:18:26 2011
New Revision: 132984

URL: http://llvm.org/viewvc/llvm-project?rev=132984&view=rev
Log:
Disable trunc-store simplification on vectors.


Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=132984&r1=132983&r2=132984&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Tue Jun 14 02:18:26 2011
@@ -6425,7 +6425,7 @@
 
   // FIXME: is there such a thing as a truncating indexed store?
   if (ST->isTruncatingStore() && ST->isUnindexed() &&
-      Value.getValueType().isInteger()) {
+      Value.getValueType().isInteger() && !Value.getValueType().isVector()) {
     // See if we can simplify the input to this truncstore with knowledge that
     // only the low bits are being used.  For example:
     // "truncstore (or (shl x, 8), y), i8"  -> "truncstore y, i8"