[llvm-commits] [llvm] r132680 - /llvm/trunk/lib/CodeGen/RegisterClassInfo.cpp

Jakob Stoklund Olesen stoklund at 2pi.dk
Mon Jun 6 09:36:30 PDT 2011


Author: stoklund
Date: Mon Jun  6 11:36:30 2011
New Revision: 132680

URL: http://llvm.org/viewvc/llvm-project?rev=132680&view=rev
Log:
Don't try to be clever, just preserve the target's allocation order.

The order of registers returned by getCalleeSavedRegs is used to lay out
the fixed stack slots for CSRs. Some targets like their CSRs used from
one end, and some targets want them used from the other end.

When computing an allocation order, simply preserve the relative
ordering of CSRs that the target specifies in its allocation order.
Reordering CSRs would break some targets, ARM in particular.

We still place volatiles before the CSRs, providing slightly better
results with different calling conventions.

Modified:
    llvm/trunk/lib/CodeGen/RegisterClassInfo.cpp

Modified: llvm/trunk/lib/CodeGen/RegisterClassInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterClassInfo.cpp?rev=132680&r1=132679&r2=132680&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegisterClassInfo.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegisterClassInfo.cpp Mon Jun  6 11:36:30 2011
@@ -77,7 +77,7 @@
     RCI.Order.reset(new unsigned[NumRegs]);
 
   unsigned N = 0;
-  SmallVector<std::pair<unsigned, unsigned>, 8> CSRAlias;
+  SmallVector<unsigned, 16> CSRAlias;
 
   // FIXME: Once targets reserve registers instead of removing them from the
   // allocation order, we can simply use begin/end here.
@@ -89,22 +89,17 @@
     // Remove reserved registers from the allocation order.
     if (Reserved.test(PhysReg))
       continue;
-    if (unsigned CSR = CSRNum[PhysReg])
-      // PhysReg aliases a CSR, save it for later.  Provide a (CSR, N) sort key
-      // to preserve the original ordering of multiple aliases of the same CSR.
-      CSRAlias.push_back(std::make_pair((CSR << 16) + (I - AOB), PhysReg));
+    if (CSRNum[PhysReg])
+      // PhysReg aliases a CSR, save it for later.
+      CSRAlias.push_back(PhysReg);
     else
       RCI.Order[N++] = PhysReg;
   }
   RCI.NumRegs = N + CSRAlias.size();
   assert (RCI.NumRegs <= NumRegs && "Allocation order larger than regclass");
 
-  // Sort CSR aliases acording to the CSR ordering.
-  if (CSRAlias.size() >= 2)
-    array_pod_sort(CSRAlias.begin(), CSRAlias.end());
-
-  for (unsigned i = 0, e = CSRAlias.size(); i != e; ++i)
-      RCI.Order[N++] = CSRAlias[i].second;
+  // CSR aliases go after the volatile registers, preserve the target's order.
+  std::copy(CSRAlias.begin(), CSRAlias.end(), &RCI.Order[N]);
 
   DEBUG({
     dbgs() << "AllocationOrder(" << RC->getName() << ") = [";





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