[llvm-commits] [llvm] r132420 - in /llvm/trunk: lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp test/CodeGen/ARM/inlineasm3.ll

[Eric Christopher]

Author: echristo
Date: Wed Jun  1 14:55:10 2011
New Revision: 132420

URL: http://llvm.org/viewvc/llvm-project?rev=132420&view=rev
Log:
Allow bitcasts between valid types of the same size and vector
types if the vector type is legal.

Fixes rdar://9306086

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    llvm/trunk/test/CodeGen/ARM/inlineasm3.ll

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp?rev=132420&r1=132419&r2=132420&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Wed Jun  1 14:55:10 2011
@@ -282,6 +282,12 @@
     // Vector/Vector bitcast.
     return DAG.getNode(ISD::BITCAST, DL, ValueVT, Val);
   }
+  
+  // Trivial bitcast if the types are the same size and the destination
+  // vector type is legal.
+  if (PartVT.getSizeInBits() == ValueVT.getSizeInBits() &&
+      TLI.isTypeLegal(ValueVT))
+    return DAG.getNode(ISD::BITCAST, DL, ValueVT, Val);
 
   assert(ValueVT.getVectorElementType() == PartVT &&
          ValueVT.getVectorNumElements() == 1 &&

Modified: llvm/trunk/test/CodeGen/ARM/inlineasm3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/inlineasm3.ll?rev=132420&r1=132419&r2=132420&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/inlineasm3.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/inlineasm3.ll Wed Jun  1 14:55:10 2011
@@ -23,3 +23,13 @@
   %asmtmp2 = tail call i32 asm sideeffect "vmov d30, $1\0Avmov.32 $0, d30[0]\0A", "=r,w,~{d30}"(<2 x i32> undef) nounwind
   ret void
 }
+
+; Radar 9306086
+
+%0 = type { <8 x i8>, <16 x i8>* }
+
+define hidden void @conv4_8_E() nounwind {
+entry:
+%asmtmp31 = call %0 asm "vld1.u8  {$0}, [$1, :128]!\0A", "=w,=r,1"(<16 x i8>* undef) nounwind
+unreachable
+}