[llvm-commits] [llvm] r132341 - in /llvm/trunk: include/llvm/IntrinsicsXCore.td lib/Target/XCore/XCoreInstrInfo.td

[Richard Osborne]

Author: friedgold
Date: Tue May 31 11:30:33 2011
New Revision: 132341

URL: http://llvm.org/viewvc/llvm-project?rev=132341&view=rev
Log:
Fix 80 column violations.

Modified:
    llvm/trunk/include/llvm/IntrinsicsXCore.td
    llvm/trunk/lib/Target/XCore/XCoreInstrInfo.td

Modified: llvm/trunk/include/llvm/IntrinsicsXCore.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IntrinsicsXCore.td?rev=132341&r1=132340&r2=132341&view=diff
==============================================================================
--- llvm/trunk/include/llvm/IntrinsicsXCore.td (original)
+++ llvm/trunk/include/llvm/IntrinsicsXCore.td Tue May 31 11:30:33 2011
@@ -14,7 +14,9 @@
   def int_xcore_crc8 : Intrinsic<[llvm_i32_ty, llvm_i32_ty],
                                  [llvm_i32_ty,llvm_i32_ty,llvm_i32_ty],
                                  [IntrNoMem]>;
-  def int_xcore_crc32 : Intrinsic<[llvm_i32_ty],[llvm_i32_ty,llvm_i32_ty,llvm_i32_ty],[IntrNoMem]>;
+  def int_xcore_crc32 : Intrinsic<[llvm_i32_ty],
+                                  [llvm_i32_ty,llvm_i32_ty,llvm_i32_ty],
+                                  [IntrNoMem]>;
   def int_xcore_getid : Intrinsic<[llvm_i32_ty],[],[IntrNoMem]>;
   def int_xcore_getps : Intrinsic<[llvm_i32_ty],[llvm_i32_ty]>;
   def int_xcore_setps : Intrinsic<[],[llvm_i32_ty, llvm_i32_ty]>;

Modified: llvm/trunk/lib/Target/XCore/XCoreInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreInstrInfo.td?rev=132341&r1=132340&r2=132341&view=diff
==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreInstrInfo.td (original)
+++ llvm/trunk/lib/Target/XCore/XCoreInstrInfo.td Tue May 31 11:30:33 2011
@@ -474,9 +474,12 @@
 defm ASHR : FL3R_L2RBITP<"ashr", sra>;
 
 let Constraints = "$src1 = $dst" in
-def CRC_l3r : _FL3R<(outs GRRegs:$dst), (ins GRRegs:$src1, GRRegs:$src2, GRRegs:$src3),
+def CRC_l3r : _FL3R<(outs GRRegs:$dst),
+                     (ins GRRegs:$src1, GRRegs:$src2, GRRegs:$src3),
                      "crc32 $dst, $src2, $src3",
-                     [(set GRRegs:$dst, (int_xcore_crc32 GRRegs:$src1, GRRegs:$src2, GRRegs:$src3))]>;
+                     [(set GRRegs:$dst,
+                        (int_xcore_crc32 GRRegs:$src1, GRRegs:$src2,
+                                         GRRegs:$src3))]>;
 
 // TODO inpw, outpw
 let mayStore=1 in {