[llvm-commits] [llvm] r132336 - in /llvm/trunk: include/llvm/IntrinsicsXCore.td lib/Target/XCore/XCoreInstrInfo.td test/CodeGen/XCore/bitrev.ll test/CodeGen/XCore/misc-intrinsics.ll
Richard Osborne
richard at xmos.com
Tue May 31 07:47:36 PDT 2011
Author: friedgold
Date: Tue May 31 09:47:36 2011
New Revision: 132336
URL: http://llvm.org/viewvc/llvm-project?rev=132336&view=rev
Log:
Add XCore intrinsic for crc32.
Added:
llvm/trunk/test/CodeGen/XCore/misc-intrinsics.ll
- copied, changed from r132335, llvm/trunk/test/CodeGen/XCore/bitrev.ll
Removed:
llvm/trunk/test/CodeGen/XCore/bitrev.ll
Modified:
llvm/trunk/include/llvm/IntrinsicsXCore.td
llvm/trunk/lib/Target/XCore/XCoreInstrInfo.td
Modified: llvm/trunk/include/llvm/IntrinsicsXCore.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IntrinsicsXCore.td?rev=132336&r1=132335&r2=132336&view=diff
==============================================================================
--- llvm/trunk/include/llvm/IntrinsicsXCore.td (original)
+++ llvm/trunk/include/llvm/IntrinsicsXCore.td Tue May 31 09:47:36 2011
@@ -11,6 +11,7 @@
let TargetPrefix = "xcore" in { // All intrinsics start with "llvm.xcore.".
// Miscellaneous instructions.
def int_xcore_bitrev : Intrinsic<[llvm_i32_ty],[llvm_i32_ty],[IntrNoMem]>;
+ def int_xcore_crc32 : Intrinsic<[llvm_i32_ty],[llvm_i32_ty,llvm_i32_ty,llvm_i32_ty],[IntrNoMem]>;
def int_xcore_getid : Intrinsic<[llvm_i32_ty],[],[IntrNoMem]>;
def int_xcore_getps : Intrinsic<[llvm_i32_ty],[llvm_i32_ty]>;
def int_xcore_setps : Intrinsic<[],[llvm_i32_ty, llvm_i32_ty]>;
Modified: llvm/trunk/lib/Target/XCore/XCoreInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreInstrInfo.td?rev=132336&r1=132335&r2=132336&view=diff
==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreInstrInfo.td (original)
+++ llvm/trunk/lib/Target/XCore/XCoreInstrInfo.td Tue May 31 09:47:36 2011
@@ -472,7 +472,13 @@
}
def XOR_l3r : FL3R<"xor", xor>;
defm ASHR : FL3R_L2RBITP<"ashr", sra>;
-// TODO crc32, crc8, inpw, outpw
+
+let Constraints = "$src1 = $dst" in
+def CRC_l3r : _FL3R<(outs GRRegs:$dst), (ins GRRegs:$src1, GRRegs:$src2, GRRegs:$src3),
+ "crc32 $dst, $src2, $src3",
+ [(set GRRegs:$dst, (int_xcore_crc32 GRRegs:$src1, GRRegs:$src2, GRRegs:$src3))]>;
+
+// TODO inpw, outpw
let mayStore=1 in {
def ST16_l3r : _FL3R<(outs), (ins GRRegs:$val, GRRegs:$addr, GRRegs:$offset),
"st16 $val, $addr[$offset]",
Removed: llvm/trunk/test/CodeGen/XCore/bitrev.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/bitrev.ll?rev=132335&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/XCore/bitrev.ll (original)
+++ llvm/trunk/test/CodeGen/XCore/bitrev.ll (removed)
@@ -1,9 +0,0 @@
-; RUN: llc < %s -march=xcore | FileCheck %s
-declare i32 @llvm.xcore.bitrev(i32)
-
-define i32 @bitrev(i32 %val) {
-; CHECK: bitrev:
-; CHECK: bitrev r0, r0
- %result = call i32 @llvm.xcore.bitrev(i32 %val)
- ret i32 %result
-}
Copied: llvm/trunk/test/CodeGen/XCore/misc-intrinsics.ll (from r132335, llvm/trunk/test/CodeGen/XCore/bitrev.ll)
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/misc-intrinsics.ll?p2=llvm/trunk/test/CodeGen/XCore/misc-intrinsics.ll&p1=llvm/trunk/test/CodeGen/XCore/bitrev.ll&r1=132335&r2=132336&rev=132336&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/XCore/bitrev.ll (original)
+++ llvm/trunk/test/CodeGen/XCore/misc-intrinsics.ll Tue May 31 09:47:36 2011
@@ -1,5 +1,6 @@
; RUN: llc < %s -march=xcore | FileCheck %s
declare i32 @llvm.xcore.bitrev(i32)
+declare i32 @llvm.xcore.crc32(i32, i32, i32)
define i32 @bitrev(i32 %val) {
; CHECK: bitrev:
@@ -7,3 +8,10 @@
%result = call i32 @llvm.xcore.bitrev(i32 %val)
ret i32 %result
}
+
+define i32 @crc32(i32 %crc, i32 %data, i32 %poly) {
+; CHECK: crc32:
+; CHECK: crc32 r0, r1, r2
+ %result = call i32 @llvm.xcore.crc32(i32 %crc, i32 %data, i32 %poly)
+ ret i32 %result
+}
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