[llvm-commits] dwarf regnum for the x86 subregisters

[Devang Patel]

On May 26, 2011, at 6:46 PM, Jakob Stoklund Olesen wrote:

> 
> On May 26, 2011, at 4:31 PM, Devang Patel wrote:
> 
>> 
>> On May 26, 2011, at 3:28 PM, Rafael Avila de Espindola wrote:
>> 
>>> I started working on PR9826. To fix it I need tblgen to produce a mapping from dwarf register number to llvm register number.
>>> 
>>> I now know that this mapping cannot be unique because of cases like xmm0/ymm0. I will have to pick one (maybe the first one in the file?).
>>> 
>>> Even ignoring cases like xmm0/ymm0, we still declare many duplicated dwarf numbers:
>>> 
>>> def AH : Register<"ah">, DwarfRegNum<[0, 0, 0]>;
>>> def AL : Register<"al">, DwarfRegNum<[0, 0, 0]>;
>>> def AX : RegisterWithSubRegs<"ax", [AL,AH]>, DwarfRegNum<[0, 0, 0]>;
>>> ...
>>> 
>>> Are we doing the right thing in here? On the other end the debugger is going to map 0 to eax (or rax if in 64 bit mode). Should we refer to subregisters like AH with a DW_OP_bit_piece of EAX (or RAX if in 64 bit mode)?
>> 
>> We should refer to sub registers with DW_OP_bit_piece...
> 
> PR9872 has an example where an 8-bit user variable ends up in bits 8-15 of %esi. That isn't even a sub-register. It would be nice if we could represent that as well.

We can. DW_OP_bit_piece takes two parameters, size and offset. So something like "DW_OP_reg4 DW_OP_bit_piece 8 8" would express where is %esi is reg4.

-
Devang