[llvm-commits] [cfe-commits] [PATCH] ARM strexd and ldrexd intrinsics

Renato Golin rengolin at systemcall.org
Wed May 25 01:09:37 PDT 2011


On 25 May 2011 04:20, Bruno Cardoso Lopes <bruno.cardoso at gmail.com> wrote:
> I see no reason for it go in another separated patch, because it's a
> requirement, if it's not in pairs, the instruction is wrong.
(...)
> I lower both of them, the former using tablegen, the later in iseldag.
> I have no plans to add the others, the only reason I'm trying to add
> this one is because there's no way to represent the pair restriction
> using inline asm.

Ok, just checking. ;)


> Because of that, I still think that would be good to have a "ldrexd"
> and "strexd" around. But I'm open to any better approach, if there's
> one available.

Yes, I know. My idea was to use @llvm.atomic.load.i64 (rather than
load.add.i64) to map to the same concept.

I don't know if other architectures have the atomic load/store
instructions, but if they do, it makes sense to be generic.

thanks,
--renato



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