[llvm-commits] [llvm] r127667 - in /llvm/trunk: include/llvm/Target/Target.td include/llvm/Target/TargetInstrDesc.h utils/TableGen/CodeGenDAGPatterns.cpp utils/TableGen/CodeGenInstruction.cpp utils/TableGen/CodeGenInstruction.h utils/TableGen/InstrInfoEmitter.cpp

Chris Lattner clattner at apple.com
Sat May 21 22:08:38 PDT 2011


On Mar 14, 2011, at 10:09 PM, Evan Cheng wrote:

> Author: evancheng
> Date: Tue Mar 15 00:09:26 2011
> New Revision: 127667
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=127667&view=rev
> Log:
> - Add "Bitcast" target instruction property for instructions which perform
> nothing more than a bitcast.
> - Teach tablegen to automatically infer "Bitcast" property.

Very nice!

> +++ llvm/trunk/include/llvm/Target/TargetInstrDesc.h Tue Mar 15 00:09:26 2011
> @@ -358,6 +359,12 @@
>   bool isMoveImmediate() const {
>     return Flags & (1 << TID::MoveImm);
>   }
> +
> +  /// isBitcast - Return true if this instruction is a bitcast instruction.
> +  ///
> +  bool isBitcast() const {
> +    return Flags & (1 << TID::Bitcast);
> +  }

Please add some comments about what a bitcast means.  For example, that there is exactly one source and one destination register with no other operands, they are of different register classes, that no information is lost in the conversion, etc.

-Chris

> 
>   /// isNotDuplicable - Return true if this instruction cannot be safely
>   /// duplicated.  For example, if the instruction has a unique labels attached
> 
> Modified: llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp?rev=127667&r1=127666&r2=127667&view=diff
> ==============================================================================
> --- llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp (original)
> +++ llvm/trunk/utils/TableGen/CodeGenDAGPatterns.cpp Tue Mar 15 00:09:26 2011
> @@ -2288,13 +2288,14 @@
>   const CodeGenDAGPatterns &CDP;
>   bool &mayStore;
>   bool &mayLoad;
> +  bool &IsBitcast;
>   bool &HasSideEffects;
>   bool &IsVariadic;
> public:
>   InstAnalyzer(const CodeGenDAGPatterns &cdp,
> -               bool &maystore, bool &mayload, bool &hse, bool &isv)
> -    : CDP(cdp), mayStore(maystore), mayLoad(mayload), HasSideEffects(hse),
> -      IsVariadic(isv) {
> +               bool &maystore, bool &mayload, bool &isbc, bool &hse, bool &isv)
> +    : CDP(cdp), mayStore(maystore), mayLoad(mayload), IsBitcast(isbc),
> +      HasSideEffects(hse), IsVariadic(isv) {
>   }
> 
>   /// Analyze - Analyze the specified instruction, returning true if the
> @@ -2313,6 +2314,29 @@
>   }
> 
> private:
> +  bool IsNodeBitcast(const TreePatternNode *N) const {
> +    if (HasSideEffects || mayLoad || mayStore || IsVariadic)
> +      return false;
> +
> +    if (N->getNumChildren() != 2)
> +      return false;
> +
> +    const TreePatternNode *N0 = N->getChild(0);
> +    if (!N0->isLeaf() || !dynamic_cast<DefInit*>(N0->getLeafValue()))
> +      return false;
> +
> +    const TreePatternNode *N1 = N->getChild(1);
> +    if (N1->isLeaf())
> +      return false;
> +    if (N1->getNumChildren() != 1 || !N1->getChild(0)->isLeaf())
> +      return false;
> +
> +    const SDNodeInfo &OpInfo = CDP.getSDNodeInfo(N1->getOperator());
> +    if (OpInfo.getNumResults() != 1 || OpInfo.getNumOperands() != 1)
> +      return false;
> +    return OpInfo.getEnumName() == "ISD::BITCAST";
> +  }
> +
>   void AnalyzeNode(const TreePatternNode *N) {
>     if (N->isLeaf()) {
>       if (DefInit *DI = dynamic_cast<DefInit*>(N->getLeafValue())) {
> @@ -2333,8 +2357,10 @@
>       AnalyzeNode(N->getChild(i));
> 
>     // Ignore set nodes, which are not SDNodes.
> -    if (N->getOperator()->getName() == "set")
> +    if (N->getOperator()->getName() == "set") {
> +      IsBitcast = IsNodeBitcast(N);
>       return;
> +    }
> 
>     // Get information about the SDNode for the operator.
>     const SDNodeInfo &OpInfo = CDP.getSDNodeInfo(N->getOperator());
> @@ -2363,12 +2389,13 @@
> 
> static void InferFromPattern(const CodeGenInstruction &Inst,
>                              bool &MayStore, bool &MayLoad,
> +                             bool &IsBitcast,
>                              bool &HasSideEffects, bool &IsVariadic,
>                              const CodeGenDAGPatterns &CDP) {
> -  MayStore = MayLoad = HasSideEffects = IsVariadic = false;
> +  MayStore = MayLoad = IsBitcast = HasSideEffects = IsVariadic = false;
> 
>   bool HadPattern =
> -    InstAnalyzer(CDP, MayStore, MayLoad, HasSideEffects, IsVariadic)
> +    InstAnalyzer(CDP, MayStore, MayLoad, IsBitcast, HasSideEffects, IsVariadic)
>     .Analyze(Inst.TheDef);
> 
>   // InstAnalyzer only correctly analyzes mayStore/mayLoad so far.
> @@ -2714,11 +2741,12 @@
>     CodeGenInstruction &InstInfo =
>       const_cast<CodeGenInstruction &>(*Instructions[i]);
>     // Determine properties of the instruction from its pattern.
> -    bool MayStore, MayLoad, HasSideEffects, IsVariadic;
> -    InferFromPattern(InstInfo, MayStore, MayLoad, HasSideEffects, IsVariadic,
> -                     *this);
> +    bool MayStore, MayLoad, IsBitcast, HasSideEffects, IsVariadic;
> +    InferFromPattern(InstInfo, MayStore, MayLoad, IsBitcast,
> +                     HasSideEffects, IsVariadic, *this);
>     InstInfo.mayStore = MayStore;
>     InstInfo.mayLoad = MayLoad;
> +    InstInfo.isBitcast = IsBitcast;
>     InstInfo.hasSideEffects = HasSideEffects;
>     InstInfo.Operands.isVariadic = IsVariadic;
>   }
> 
> Modified: llvm/trunk/utils/TableGen/CodeGenInstruction.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenInstruction.cpp?rev=127667&r1=127666&r2=127667&view=diff
> ==============================================================================
> --- llvm/trunk/utils/TableGen/CodeGenInstruction.cpp (original)
> +++ llvm/trunk/utils/TableGen/CodeGenInstruction.cpp Tue Mar 15 00:09:26 2011
> @@ -288,6 +288,7 @@
>   isIndirectBranch = R->getValueAsBit("isIndirectBranch");
>   isCompare    = R->getValueAsBit("isCompare");
>   isMoveImm    = R->getValueAsBit("isMoveImm");
> +  isBitcast    = R->getValueAsBit("isBitcast");
>   isBarrier    = R->getValueAsBit("isBarrier");
>   isCall       = R->getValueAsBit("isCall");
>   canFoldAsLoad = R->getValueAsBit("canFoldAsLoad");
> 
> Modified: llvm/trunk/utils/TableGen/CodeGenInstruction.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenInstruction.h?rev=127667&r1=127666&r2=127667&view=diff
> ==============================================================================
> --- llvm/trunk/utils/TableGen/CodeGenInstruction.h (original)
> +++ llvm/trunk/utils/TableGen/CodeGenInstruction.h Tue Mar 15 00:09:26 2011
> @@ -215,6 +215,7 @@
>     bool isIndirectBranch;
>     bool isCompare;
>     bool isMoveImm;
> +    bool isBitcast;
>     bool isBarrier;
>     bool isCall;
>     bool canFoldAsLoad;
> 
> Modified: llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp?rev=127667&r1=127666&r2=127667&view=diff
> ==============================================================================
> --- llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp (original)
> +++ llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp Tue Mar 15 00:09:26 2011
> @@ -272,6 +272,7 @@
>   if (Inst.isIndirectBranch)   OS << "|(1<<TID::IndirectBranch)";
>   if (Inst.isCompare)          OS << "|(1<<TID::Compare)";
>   if (Inst.isMoveImm)          OS << "|(1<<TID::MoveImm)";
> +  if (Inst.isBitcast)          OS << "|(1<<TID::Bitcast)";
>   if (Inst.isBarrier)          OS << "|(1<<TID::Barrier)";
>   if (Inst.hasDelaySlot)       OS << "|(1<<TID::DelaySlot)";
>   if (Inst.isCall)             OS << "|(1<<TID::Call)";
> 
> 
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