[llvm-commits] [llvm] r131787 - /llvm/trunk/lib/Target/X86/X86RegisterInfo.td

[Cameron Zwarich]

Author: zwarich
Date: Fri May 20 23:13:49 2011
New Revision: 131787

URL: http://llvm.org/viewvc/llvm-project?rev=131787&view=rev
Log:
Fix PR9978 by adding RIP to GR64_TC so it can be used as an address in PIC code. It
is already in GR64 for the same reasons. Since it isn't allocatable it can't cause
any problems.

Modified:
    llvm/trunk/lib/Target/X86/X86RegisterInfo.td

Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.td?rev=131787&r1=131786&r2=131787&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86RegisterInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86RegisterInfo.td Fri May 20 23:13:49 2011
@@ -496,7 +496,7 @@
   let SubRegClasses = [(GR8 sub_8bit, sub_8bit_hi), (GR16 sub_16bit)];
 }
 def GR64_TC   : RegisterClass<"X86", [i64], 64, [RAX, RCX, RDX, RSI, RDI,
-                                                 R8, R9, R11]> {
+                                                 R8, R9, R11, RIP]> {
   let SubRegClasses = [(GR8 sub_8bit, sub_8bit_hi),
                        (GR16 sub_16bit),
                        (GR32_TC sub_32bit)];