[llvm-commits] [llvm] r131708 - in /llvm/trunk: lib/Target/ARM/ARMISelLowering.cpp lib/Target/ARM/ARMSubtarget.cpp lib/Target/ARM/ARMSubtarget.h lib/Target/X86/X86ISelLowering.cpp lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp test/CodeGen/X86/crc64.ll test/Transforms/InstCombine/x86-crc32-demanded.ll
Evan Cheng
evan.cheng at apple.com
Thu May 19 17:54:38 PDT 2011
Author: evancheng
Date: Thu May 19 19:54:37 2011
New Revision: 131708
URL: http://llvm.org/viewvc/llvm-project?rev=131708&view=rev
Log:
Revert r131664 and fix it in instcombine instead. rdar://9467055
Added:
llvm/trunk/test/Transforms/InstCombine/x86-crc32-demanded.ll
Removed:
llvm/trunk/test/CodeGen/X86/crc64.ll
Modified:
llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp
llvm/trunk/lib/Target/ARM/ARMSubtarget.h
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=131708&r1=131707&r2=131708&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Thu May 19 19:54:37 2011
@@ -1182,7 +1182,7 @@
bool IsStructRet = (Outs.empty()) ? false : Outs[0].Flags.isSRet();
bool IsSibCall = false;
// Temporarily disable tail calls so things don't break.
- if (!EnableARMTailCalls)
+ if (!EnableARMTailCalls && !Subtarget->supportsTailCall())
isTailCall = false;
if (isTailCall) {
// Check if it's really possible to do a tail call.
Modified: llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp?rev=131708&r1=131707&r2=131708&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMSubtarget.cpp Thu May 19 19:54:37 2011
@@ -46,6 +46,7 @@
, PostRAScheduler(false)
, IsR9Reserved(ReserveR9)
, UseMovt(false)
+ , SupportsTailCall(false)
, HasFP16(false)
, HasD16(false)
, HasHardwareDivide(false)
@@ -153,6 +154,8 @@
else {
IsR9Reserved = ReserveR9 | (ARMArchVersion < V6);
UseMovt = DarwinUseMOVT && hasV6T2Ops();
+ const Triple &T = getTargetTriple();
+ SupportsTailCall = T.getOS() == Triple::IOS && !T.isOSVersionLT(5, 0);
}
if (!isThumb() || hasThumb2())
Modified: llvm/trunk/lib/Target/ARM/ARMSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMSubtarget.h?rev=131708&r1=131707&r2=131708&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMSubtarget.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMSubtarget.h Thu May 19 19:54:37 2011
@@ -87,6 +87,11 @@
/// imms (including global addresses).
bool UseMovt;
+ /// SupportsTailCall - True if the OS supports tail call. The dynamic linker
+ /// must be able to synthesize call stubs for interworking between ARM and
+ /// Thumb.
+ bool SupportsTailCall;
+
/// HasFP16 - True if subtarget supports half-precision FP (We support VFP+HF
/// only so far)
bool HasFP16;
@@ -217,6 +222,7 @@
bool isR9Reserved() const { return IsR9Reserved; }
bool useMovt() const { return UseMovt && hasV6T2Ops(); }
+ bool supportsTailCall() const { return SupportsTailCall; }
bool allowsUnalignedMem() const { return AllowsUnalignedMem; }
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=131708&r1=131707&r2=131708&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu May 19 19:54:37 2011
@@ -10939,19 +10939,6 @@
KnownZero |= APInt::getHighBitsSet(Mask.getBitWidth(),
Mask.getBitWidth() - 1);
break;
-
- case ISD::INTRINSIC_WO_CHAIN: {
- unsigned IntNo = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
- switch (IntNo) {
- default: break;
- case Intrinsic::x86_sse42_crc64_8:
- case Intrinsic::x86_sse42_crc64_64:
- // crc32 with 64-bit destination zeros high 32-bit.
- KnownZero |= APInt::getHighBitsSet(64, 32);
- break;
- }
- break;
- }
}
}
Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp?rev=131708&r1=131707&r2=131708&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp Thu May 19 19:54:37 2011
@@ -780,6 +780,10 @@
// TODO: Could compute known zero/one bits based on the input.
break;
}
+ case Intrinsic::x86_sse42_crc64_8:
+ case Intrinsic::x86_sse42_crc64_64:
+ KnownZero = APInt::getHighBitsSet(64, 32);
+ return 0;
}
}
ComputeMaskedBits(V, DemandedMask, KnownZero, KnownOne, Depth);
Removed: llvm/trunk/test/CodeGen/X86/crc64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/crc64.ll?rev=131707&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/crc64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/crc64.ll (removed)
@@ -1,19 +0,0 @@
-; RUN: llc < %s -march=x86-64 -mattr=sse42 | FileCheck %s
-
-; crc32 with 64-bit destination zeros high 32-bit.
-; rdar://9467055
-
-define i64 @t() nounwind {
-entry:
-; CHECK: t:
-; CHECK: crc32q
-; CHECK-NOT: mov
-; CHECK-NEXT: crc32q
- %0 = tail call i64 @llvm.x86.sse42.crc64.64(i64 0, i64 4) nounwind
- %1 = and i64 %0, 4294967295
- %2 = tail call i64 @llvm.x86.sse42.crc64.64(i64 %1, i64 4) nounwind
- %3 = and i64 %2, 4294967295
- ret i64 %3
-}
-
-declare i64 @llvm.x86.sse42.crc64.64(i64, i64) nounwind readnone
Added: llvm/trunk/test/Transforms/InstCombine/x86-crc32-demanded.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/x86-crc32-demanded.ll?rev=131708&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/x86-crc32-demanded.ll (added)
+++ llvm/trunk/test/Transforms/InstCombine/x86-crc32-demanded.ll Thu May 19 19:54:37 2011
@@ -0,0 +1,17 @@
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+; crc32 with 64-bit destination zeros high 32-bit.
+; rdar://9467055
+
+define i64 @test() nounwind {
+entry:
+; CHECK: test
+; CHECK: tail call i64 @llvm.x86.sse42.crc64.64
+; CHECK-NOT: and
+; CHECK: ret
+ %0 = tail call i64 @llvm.x86.sse42.crc64.64(i64 0, i64 4) nounwind
+ %1 = and i64 %0, 4294967295
+ ret i64 %1
+}
+
+declare i64 @llvm.x86.sse42.crc64.64(i64, i64) nounwind readnone
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