[llvm-commits] [llvm] r131682 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/9601.ll

[Eric Christopher]

Author: echristo
Date: Thu May 19 16:33:47 2011
New Revision: 131682

URL: http://llvm.org/viewvc/llvm-project?rev=131682&view=rev
Log:
Oddly people want to use the 'r' constraint for fp constants on x86.

Fixes rdar://9218925
Fixes PR9601

Added:
    llvm/trunk/test/CodeGen/X86/9601.ll
Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=131682&r1=131681&r2=131682&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu May 19 16:33:47 2011
@@ -12766,7 +12766,7 @@
         return std::make_pair(0U, X86::GR8RegisterClass);
       if (VT == MVT::i16)
         return std::make_pair(0U, X86::GR16RegisterClass);
-      if (VT == MVT::i32 || !Subtarget->is64Bit())
+      if (VT == MVT::i32 || VT == MVT::f32 || !Subtarget->is64Bit())
         return std::make_pair(0U, X86::GR32RegisterClass);
       return std::make_pair(0U, X86::GR64RegisterClass);
     case 'R':   // LEGACY_REGS

Added: llvm/trunk/test/CodeGen/X86/9601.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/9601.ll?rev=131682&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/9601.ll (added)
+++ llvm/trunk/test/CodeGen/X86/9601.ll Thu May 19 16:33:47 2011
@@ -0,0 +1,12 @@
+; RUN:  llc < %s -mtriple=x86_64-unknown-linux-gnu
+; PR9601
+; Previously we'd crash trying to put a 32-bit float into a constraint
+; for a normal 'r' register.
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
+target triple = "x86_64-unknown-linux-gnu"
+
+define void @test() {
+entry:
+  %0 = call float asm sideeffect "xchg $0, $1", "=r,*m,0,~{memory},~{dirflag},~{fpsr},~{flags}"(i32* undef, float 2.000000e+00) nounwind
+  unreachable
+}