[llvm-commits] [llvm] r131417 - in /llvm/trunk: include/llvm/CodeGen/FastISel.h lib/CodeGen/SelectionDAG/FastISel.cpp test/CodeGen/X86/fast-isel-extract.ll
Eli Friedman
eli.friedman at gmail.com
Mon May 16 13:27:46 PDT 2011
Author: efriedma
Date: Mon May 16 15:27:46 2011
New Revision: 131417
URL: http://llvm.org/viewvc/llvm-project?rev=131417&view=rev
Log:
Basic fast-isel of extractvalue. Not too helpful on its own, given the IR clang generates for cases like this, but it should become more useful soon.
Added:
llvm/trunk/test/CodeGen/X86/fast-isel-extract.ll
Modified:
llvm/trunk/include/llvm/CodeGen/FastISel.h
llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp
Modified: llvm/trunk/include/llvm/CodeGen/FastISel.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/FastISel.h?rev=131417&r1=131416&r2=131417&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/FastISel.h (original)
+++ llvm/trunk/include/llvm/CodeGen/FastISel.h Mon May 16 15:27:46 2011
@@ -343,6 +343,8 @@
bool SelectCast(const User *I, unsigned Opcode);
+ bool SelectExtractValue(const User *I);
+
/// HandlePHINodesInSuccessorBlocks - Handle PHI nodes in successor blocks.
/// Emit code to ensure constants are copied into registers when needed.
/// Remember the virtual registers that need to be added to the Machine PHI
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp?rev=131417&r1=131416&r2=131417&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp Mon May 16 15:27:46 2011
@@ -44,6 +44,7 @@
#include "llvm/Instructions.h"
#include "llvm/IntrinsicInst.h"
#include "llvm/Operator.h"
+#include "llvm/CodeGen/Analysis.h"
#include "llvm/CodeGen/FastISel.h"
#include "llvm/CodeGen/FunctionLoweringInfo.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
@@ -839,6 +840,44 @@
}
bool
+FastISel::SelectExtractValue(const User *U) {
+ const ExtractValueInst *EVI = dyn_cast<ExtractValueInst>(U);
+ if (!U)
+ return false;
+
+ // Make sure we only try to handle extracts with a legal result.
+ EVT RealVT = TLI.getValueType(EVI->getType(), /*AllowUnknown=*/true);
+ if (!RealVT.isSimple())
+ return false;
+ MVT VT = RealVT.getSimpleVT();
+ if (!TLI.isTypeLegal(VT))
+ return false;
+
+ const Value *Op0 = EVI->getOperand(0);
+ const Type *AggTy = Op0->getType();
+
+ // Get the base result register.
+ unsigned ResultReg;
+ DenseMap<const Value *, unsigned>::iterator I = FuncInfo.ValueMap.find(Op0);
+ if (I != FuncInfo.ValueMap.end())
+ ResultReg = I->second;
+ else
+ ResultReg = FuncInfo.InitializeRegForValue(Op0);
+
+ // Get the actual result register, which is an offset from the base register.
+ unsigned VTIndex = ComputeLinearIndex(AggTy, EVI->idx_begin(), EVI->idx_end());
+
+ SmallVector<EVT, 4> AggValueVTs;
+ ComputeValueVTs(TLI, AggTy, AggValueVTs);
+
+ for (unsigned i = 0; i < VTIndex; i++)
+ ResultReg += TLI.getNumRegisters(FuncInfo.Fn->getContext(), AggValueVTs[i]);
+
+ UpdateValueMap(EVI, ResultReg);
+ return true;
+}
+
+bool
FastISel::SelectOperator(const User *I, unsigned Opcode) {
switch (Opcode) {
case Instruction::Add:
@@ -942,6 +981,9 @@
return true;
}
+ case Instruction::ExtractValue:
+ return SelectExtractValue(I);
+
case Instruction::PHI:
llvm_unreachable("FastISel shouldn't visit PHI nodes!");
Added: llvm/trunk/test/CodeGen/X86/fast-isel-extract.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-isel-extract.ll?rev=131417&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fast-isel-extract.ll (added)
+++ llvm/trunk/test/CodeGen/X86/fast-isel-extract.ll Mon May 16 15:27:46 2011
@@ -0,0 +1,26 @@
+; RUN: llc < %s -mtriple x86_64-apple-darwin11 -O0 | FileCheck %s
+
+%struct.x = type { i64, i64 }
+declare %struct.x @f()
+
+define void @test1(i64*) nounwind ssp {
+ %2 = tail call %struct.x @f() nounwind
+ %3 = extractvalue %struct.x %2, 0
+ %4 = add i64 %3, 10
+ store i64 %4, i64* %0
+ ret void
+; CHECK: test1:
+; CHECK: callq _f
+; CHECK-NEXT: addq $10, %rax
+}
+
+define void @test2(i64*) nounwind ssp {
+ %2 = tail call %struct.x @f() nounwind
+ %3 = extractvalue %struct.x %2, 1
+ %4 = add i64 %3, 10
+ store i64 %4, i64* %0
+ ret void
+; CHECK: test2:
+; CHECK: callq _f
+; CHECK-NEXT: addq $10, %rdx
+}
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