[llvm-commits] [PATCH] Mips backend. Emit $gp restore instructions.
Akira Hatanaka
ahatanak at gmail.com
Tue May 3 16:18:12 PDT 2011
This patch prevents instructions using $gp from being placed between a jalr
and the instruction that restores the clobbered $gp (please see the
following example).
The current implementation creates load nodes that restore $gp when call
instructions are lowered in MipsISelLowering::LowerCall. However, it does
not add chains or glues that are needed to make sure load/store nodes that
have $gp as an operand are not scheduled between JALR nodes and nodes that
restore $gp after the call.
This patch runs a pre-regalloc pass that emits $gp restore instructions
instead.
- bitcode
@p = external global i32
...
tail call void (...)* @f1() nounwind
%tmp = load i32* @p, align 4, !tbaa !0
- currently produces following code:
...
lw $25, %call16(f1)($gp)
jalr $25 # calls f1. $gp is clobbered.
nop
lw $3, 16($sp) # load $gp from stack.
lw $2, %got(p)($gp) # this instr uses a clobbered $gp.
addu $gp, $zero, $3 # $gp is restored here.
...
- produces following code after patch is applied.
...
lw $25, %call16(f1)($gp)
lw $16, %got(p)($gp) # $gp has correct value here.
jalr $25 # calls f1. clobbers $gp.
nop
lw $gp, 16($sp) # $gp restored.
...
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