[llvm-commits] [llvm] r130462 - in /llvm/trunk: lib/Target/ARM/ARMFastISel.cpp test/CodeGen/ARM/fast-isel-redefinition.ll

[Eli Friedman]

Author: efriedma
Date: Thu Apr 28 18:55:14 2011
New Revision: 130462

URL: http://llvm.org/viewvc/llvm-project?rev=130462&view=rev
Log:
Revert r130454; apparently this doesn't actually work.


Removed:
    llvm/trunk/test/CodeGen/ARM/fast-isel-redefinition.ll
Modified:
    llvm/trunk/lib/Target/ARM/ARMFastISel.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMFastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMFastISel.cpp?rev=130462&r1=130461&r2=130462&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMFastISel.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMFastISel.cpp Thu Apr 28 18:55:14 2011
@@ -822,9 +822,26 @@
   // Since the offset is too large for the load/store instruction
   // get the reg+offset into a register.
   if (needsLowering) {
-    Addr.Base.Reg = FastEmit_ri_(MVT::i32, ISD::ADD, Addr.Base.Reg,
-                                 /*Op0IsKill*/false, Addr.Offset, MVT::i32);
+    ARMCC::CondCodes Pred = ARMCC::AL;
+    unsigned PredReg = 0;
+
+    TargetRegisterClass *RC = isThumb ? ARM::tGPRRegisterClass :
+      ARM::GPRRegisterClass;
+    unsigned BaseReg = createResultReg(RC);
+
+    if (!isThumb)
+      emitARMRegPlusImmediate(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
+                              BaseReg, Addr.Base.Reg, Addr.Offset,
+                              Pred, PredReg,
+                              static_cast<const ARMBaseInstrInfo&>(TII));
+    else {
+      assert(AFI->isThumb2Function());
+      emitT2RegPlusImmediate(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
+                             BaseReg, Addr.Base.Reg, Addr.Offset, Pred, PredReg,
+                             static_cast<const ARMBaseInstrInfo&>(TII));
+    }
     Addr.Offset = 0;
+    Addr.Base.Reg = BaseReg;
   }
 }
 

Removed: llvm/trunk/test/CodeGen/ARM/fast-isel-redefinition.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fast-isel-redefinition.ll?rev=130461&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/fast-isel-redefinition.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/fast-isel-redefinition.ll (removed)
@@ -1,11 +0,0 @@
-; RUN: llc -O0 -regalloc=linearscan < %s
-; This isn't exactly a useful set of command-line options, but check that it
-; doesn't crash.  (It was crashing because a register was getting redefined.)
-
-target triple = "thumbv7-apple-macosx10.6.7"
-
-define i32 @f(i32* %x) nounwind ssp {
-  %y = getelementptr inbounds i32* %x, i32 5000
-  %tmp103 = load i32* %y, align 4
-  ret i32 %tmp103
-}