[llvm-commits] [llvm] r130327 - in /llvm/trunk: lib/Analysis/BasicAliasAnalysis.cpp test/Analysis/BasicAA/intrinsics.ll
Dan Gohman
gohman at apple.com
Wed Apr 27 13:44:28 PDT 2011
Author: djg
Date: Wed Apr 27 15:44:28 2011
New Revision: 130327
URL: http://llvm.org/viewvc/llvm-project?rev=130327&view=rev
Log:
Teach BasicAA about arm.neon.vld1 and vst1.
Modified:
llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp
llvm/trunk/test/Analysis/BasicAA/intrinsics.ll
Modified: llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp?rev=130327&r1=130326&r2=130327&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp Wed Apr 27 15:44:28 2011
@@ -779,6 +779,26 @@
return NoModRef;
break;
}
+ case Intrinsic::arm_neon_vld1: {
+ // LLVM's vld1 and vst1 intrinsics currently only support a single
+ // vector register.
+ uint64_t Size =
+ TD ? TD->getTypeStoreSize(II->getType()) : UnknownSize;
+ if (isNoAlias(Location(II->getArgOperand(0), Size,
+ II->getMetadata(LLVMContext::MD_tbaa)),
+ Loc))
+ return NoModRef;
+ break;
+ }
+ case Intrinsic::arm_neon_vst1: {
+ uint64_t Size =
+ TD ? TD->getTypeStoreSize(II->getArgOperand(1)->getType()) : UnknownSize;
+ if (isNoAlias(Location(II->getArgOperand(0), Size,
+ II->getMetadata(LLVMContext::MD_tbaa)),
+ Loc))
+ return NoModRef;
+ break;
+ }
}
// The AliasAnalysis base class has some smarts, lets use them.
Modified: llvm/trunk/test/Analysis/BasicAA/intrinsics.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/BasicAA/intrinsics.ll?rev=130327&r1=130326&r2=130327&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/BasicAA/intrinsics.ll (original)
+++ llvm/trunk/test/Analysis/BasicAA/intrinsics.ll Wed Apr 27 15:44:28 2011
@@ -19,5 +19,21 @@
ret <8 x i16> %c
}
+; CHECK: define <8 x i16> @test1(i8* %p, <8 x i16> %y) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: %q = getelementptr i8* %p, i64 16
+; CHECK-NEXT: %a = call <8 x i16> @llvm.arm.neon.vld1.v8i16(i8* %p, i32 16) nounwind
+; CHECK-NEXT: call void @llvm.arm.neon.vst1.v8i16(i8* %q, <8 x i16> %y, i32 16)
+; CHECK-NEXT: %c = add <8 x i16> %a, %a
+define <8 x i16> @test1(i8* %p, <8 x i16> %y) {
+entry:
+ %q = getelementptr i8* %p, i64 16
+ %a = call <8 x i16> @llvm.arm.neon.vld1.v8i16(i8* %p, i32 16) nounwind
+ call void @llvm.arm.neon.vst1.v8i16(i8* %q, <8 x i16> %y, i32 16)
+ %b = call <8 x i16> @llvm.arm.neon.vld1.v8i16(i8* %p, i32 16) nounwind
+ %c = add <8 x i16> %a, %b
+ ret <8 x i16> %c
+}
+
declare <8 x i16> @llvm.arm.neon.vld1.v8i16(i8*, i32) nounwind readonly
declare void @llvm.arm.neon.vst1.v8i16(i8*, <8 x i16>, i32) nounwind
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