[llvm-commits] [llvm] r130274 - /llvm/trunk/lib/Target/X86/X86FastISel.cpp
Eli Friedman
eli.friedman at gmail.com
Tue Apr 26 18:45:07 PDT 2011
Author: efriedma
Date: Tue Apr 26 20:45:07 2011
New Revision: 130274
URL: http://llvm.org/viewvc/llvm-project?rev=130274&view=rev
Log:
Refactor out code to fast-isel a memcpy operation with a small constant
length. (I'm planning to use this to implement byval.)
Modified:
llvm/trunk/lib/Target/X86/X86FastISel.cpp
Modified: llvm/trunk/lib/Target/X86/X86FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FastISel.cpp?rev=130274&r1=130273&r2=130274&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86FastISel.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86FastISel.cpp Tue Apr 26 20:45:07 2011
@@ -132,6 +132,9 @@
}
bool isTypeLegal(const Type *Ty, MVT &VT, bool AllowI1 = false);
+
+ bool TryEmitSmallMemcpy(X86AddressMode DestAM,
+ X86AddressMode SrcAM, uint64_t Len);
};
} // end anonymous namespace.
@@ -1323,6 +1326,40 @@
return false;
}
+bool X86FastISel::TryEmitSmallMemcpy(X86AddressMode DestAM,
+ X86AddressMode SrcAM, uint64_t Len) {
+ // Make sure we don't bloat code by inlining very large memcpy's.
+ bool i64Legal = TLI.isTypeLegal(MVT::i64);
+ if (Len > (i64Legal ? 32 : 16)) return false;
+
+ // We don't care about alignment here since we just emit integer accesses.
+ while (Len) {
+ MVT VT;
+ if (Len >= 8 && i64Legal)
+ VT = MVT::i64;
+ else if (Len >= 4)
+ VT = MVT::i32;
+ else if (Len >= 2)
+ VT = MVT::i16;
+ else {
+ assert(Len == 1);
+ VT = MVT::i8;
+ }
+
+ unsigned Reg;
+ bool RV = X86FastEmitLoad(VT, SrcAM, Reg);
+ RV &= X86FastEmitStore(VT, Reg, DestAM);
+ assert(RV && "Failed to emit load or store??");
+
+ unsigned Size = VT.getSizeInBits()/8;
+ Len -= Size;
+ DestAM.Disp += Size;
+ SrcAM.Disp += Size;
+ }
+
+ return true;
+}
+
bool X86FastISel::X86VisitIntrinsicCall(const IntrinsicInst &I) {
// FIXME: Handle more intrinsics.
switch (I.getIntrinsicID()) {
@@ -1332,45 +1369,16 @@
// Don't handle volatile or variable length memcpys.
if (MCI.isVolatile() || !isa<ConstantInt>(MCI.getLength()))
return false;
-
- // Don't inline super long memcpys. We could lower these to a memcpy call,
- // but we might as well bail out.
+
uint64_t Len = cast<ConstantInt>(MCI.getLength())->getZExtValue();
- bool i64Legal = TLI.isTypeLegal(MVT::i64);
- if (Len > (i64Legal ? 32 : 16)) return false;
// Get the address of the dest and source addresses.
X86AddressMode DestAM, SrcAM;
if (!X86SelectAddress(MCI.getRawDest(), DestAM) ||
!X86SelectAddress(MCI.getRawSource(), SrcAM))
return false;
-
- // We don't care about alignment here since we just emit integer accesses.
- while (Len) {
- MVT VT;
- if (Len >= 8 && i64Legal)
- VT = MVT::i64;
- else if (Len >= 4)
- VT = MVT::i32;
- else if (Len >= 2)
- VT = MVT::i16;
- else {
- assert(Len == 1);
- VT = MVT::i8;
- }
-
- unsigned Reg;
- bool RV = X86FastEmitLoad(VT, SrcAM, Reg);
- RV &= X86FastEmitStore(VT, Reg, DestAM);
- assert(RV && "Failed to emit load or store??");
-
- unsigned Size = VT.getSizeInBits()/8;
- Len -= Size;
- DestAM.Disp += Size;
- SrcAM.Disp += Size;
- }
-
- return true;
+
+ return TryEmitSmallMemcpy(DestAM, SrcAM, Len);
}
case Intrinsic::stackprotector: {
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