[llvm-commits] [llvm] r130178 - in /llvm/trunk: include/llvm/CodeGen/AsmPrinter.h lib/CodeGen/AsmPrinter/AsmPrinter.cpp lib/Target/ARM/ARMAsmPrinter.cpp lib/Target/ARM/ARMAsmPrinter.h
Devang Patel
dpatel at apple.com
Mon Apr 25 17:12:46 PDT 2011
Author: dpatel
Date: Mon Apr 25 19:12:46 2011
New Revision: 130178
URL: http://llvm.org/viewvc/llvm-project?rev=130178&view=rev
Log:
Let dwarf writer allocate extra space in the debug location expression. This space, if requested, will be used for complex addresses of the Blocks' variables.
Modified:
llvm/trunk/include/llvm/CodeGen/AsmPrinter.h
llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp
llvm/trunk/lib/Target/ARM/ARMAsmPrinter.h
Modified: llvm/trunk/include/llvm/CodeGen/AsmPrinter.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/AsmPrinter.h?rev=130178&r1=130177&r2=130178&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/AsmPrinter.h (original)
+++ llvm/trunk/include/llvm/CodeGen/AsmPrinter.h Mon Apr 25 19:12:46 2011
@@ -384,7 +384,8 @@
virtual unsigned getISAEncoding() { return 0; }
/// EmitDwarfRegOp - Emit dwarf register operation.
- virtual void EmitDwarfRegOp(const MachineLocation &MLoc) const;
+ virtual void EmitDwarfRegOp(const MachineLocation &MLoc,
+ unsigned ExtraExprSize = 0) const;
//===------------------------------------------------------------------===//
// Dwarf Lowering Routines
Modified: llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp?rev=130178&r1=130177&r2=130178&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp (original)
+++ llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp Mon Apr 25 19:12:46 2011
@@ -753,7 +753,8 @@
}
/// EmitDwarfRegOp - Emit dwarf register operation.
-void AsmPrinter::EmitDwarfRegOp(const MachineLocation &MLoc) const {
+void AsmPrinter::EmitDwarfRegOp(const MachineLocation &MLoc,
+ unsigned ExtraExprSize) const {
const TargetRegisterInfo *RI = TM.getRegisterInfo();
unsigned Reg = RI->getDwarfRegNum(MLoc.getReg(), false);
if (int Offset = MLoc.getOffset()) {
@@ -761,7 +762,7 @@
// use DW_OP_fbreg.
unsigned OffsetSize = Offset ? MCAsmInfo::getSLEB128Size(Offset) : 1;
OutStreamer.AddComment("Loc expr size");
- EmitInt16(1 + OffsetSize);
+ EmitInt16(1 + OffsetSize + ExtraExprSize);
OutStreamer.AddComment(
dwarf::OperationEncodingString(dwarf::DW_OP_fbreg));
EmitInt8(dwarf::DW_OP_fbreg);
@@ -776,7 +777,7 @@
EmitInt8(dwarf::DW_OP_reg0 + Reg);
} else {
OutStreamer.AddComment("Loc expr size");
- EmitInt16(1 + MCAsmInfo::getULEB128Size(Reg));
+ EmitInt16(1 + MCAsmInfo::getULEB128Size(Reg) + ExtraExprSize);
OutStreamer.AddComment(
dwarf::OperationEncodingString(dwarf::DW_OP_regx));
EmitInt8(dwarf::DW_OP_regx);
Modified: llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp?rev=130178&r1=130177&r2=130178&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMAsmPrinter.cpp Mon Apr 25 19:12:46 2011
@@ -173,10 +173,11 @@
}
/// EmitDwarfRegOp - Emit dwarf register operation.
-void ARMAsmPrinter::EmitDwarfRegOp(const MachineLocation &MLoc) const {
+void ARMAsmPrinter::EmitDwarfRegOp(const MachineLocation &MLoc,
+ unsigned ExtraExprSize) const {
const TargetRegisterInfo *RI = TM.getRegisterInfo();
if (RI->getDwarfRegNum(MLoc.getReg(), false) != -1)
- AsmPrinter::EmitDwarfRegOp(MLoc);
+ AsmPrinter::EmitDwarfRegOp(MLoc, ExtraExprSize);
else {
unsigned Reg = MLoc.getReg();
if (Reg >= ARM::S0 && Reg <= ARM::S31) {
@@ -191,7 +192,7 @@
OutStreamer.AddComment("Loc expr size");
// DW_OP_regx + ULEB + DW_OP_bit_piece + ULEB + ULEB
// 1 + ULEB(Rx) + 1 + 1 + 1
- EmitInt16(4 + MCAsmInfo::getULEB128Size(Rx));
+ EmitInt16(4 + MCAsmInfo::getULEB128Size(Rx) + ExtraExprSize);
OutStreamer.AddComment("DW_OP_regx for S register");
EmitInt8(dwarf::DW_OP_regx);
@@ -223,7 +224,8 @@
// DW_OP_regx + ULEB + DW_OP_piece + ULEB(8) +
// DW_OP_regx + ULEB + DW_OP_piece + ULEB(8);
// 6 + ULEB(D1) + ULEB(D2)
- EmitInt16(6 + MCAsmInfo::getULEB128Size(D1) + MCAsmInfo::getULEB128Size(D2));
+ EmitInt16(6 + MCAsmInfo::getULEB128Size(D1)
+ + MCAsmInfo::getULEB128Size(D2) + ExtraExprSize);
OutStreamer.AddComment("DW_OP_regx for Q register: D1");
EmitInt8(dwarf::DW_OP_regx);
Modified: llvm/trunk/lib/Target/ARM/ARMAsmPrinter.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMAsmPrinter.h?rev=130178&r1=130177&r2=130178&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMAsmPrinter.h (original)
+++ llvm/trunk/lib/Target/ARM/ARMAsmPrinter.h Mon Apr 25 19:12:46 2011
@@ -90,7 +90,8 @@
MachineLocation getDebugValueLocation(const MachineInstr *MI) const;
/// EmitDwarfRegOp - Emit dwarf register operation.
- virtual void EmitDwarfRegOp(const MachineLocation &MLoc) const;
+ virtual void EmitDwarfRegOp(const MachineLocation &MLoc,
+ unsigned ExtraExprSize = 0) const;
virtual unsigned getISAEncoding() {
// ARM/Darwin adds ISA to the DWARF info for each function.
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