[llvm-commits] [llvm] r129693 - in /llvm/trunk: lib/CodeGen/SelectionDAG/FastISel.cpp test/CodeGen/X86/fast-isel-x86-64.ll
Chris Lattner
sabre at nondot.org
Sun Apr 17 23:55:52 PDT 2011
Author: lattner
Date: Mon Apr 18 01:55:51 2011
New Revision: 129693
URL: http://llvm.org/viewvc/llvm-project?rev=129693&view=rev
Log:
fix rdar://9297011 - udiv by power of two causing fast-isel rejects
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp
llvm/trunk/test/CodeGen/X86/fast-isel-x86-64.ll
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp?rev=129693&r1=129692&r2=129693&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp Mon Apr 18 01:55:51 2011
@@ -990,6 +990,10 @@
if (Opcode == ISD::MUL && isPowerOf2_64(Imm)) {
Opcode = ISD::SHL;
Imm = Log2_64(Imm);
+ } else if (Opcode == ISD::UDIV && isPowerOf2_64(Imm)) {
+ // div x, 8 -> srl x, 3
+ Opcode = ISD::SRL;
+ Imm = Log2_64(Imm);
}
// Horrible hack (to be removed), check to make sure shift amounts are
Modified: llvm/trunk/test/CodeGen/X86/fast-isel-x86-64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-isel-x86-64.ll?rev=129693&r1=129692&r2=129693&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fast-isel-x86-64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fast-isel-x86-64.ll Mon Apr 18 01:55:51 2011
@@ -1,4 +1,4 @@
-; RUN: llc < %s -fast-isel -O0 -regalloc=fast -asm-verbose=0 | FileCheck %s
+; RUN: llc < %s -fast-isel -O0 -regalloc=fast -asm-verbose=0 -fast-isel-abort | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-darwin10.0.0"
@@ -111,3 +111,11 @@
; CHECK: test9:
; CHECK: imulq $7, %rdi, %rax
}
+
+; rdar://9297011 - Don't reject udiv by a power of 2.
+define i32 @test10(i32 %X) nounwind {
+ %Y = udiv i32 %X, 8
+ ret i32 %Y
+; CHECK: test10:
+; CHECK: shrl $3,
+}
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