[llvm-commits] [llvm] r129618 - in /llvm/trunk: lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp test/MC/Disassembler/ARM/invalid-VLD3DUPd32_UPD-thumb.txt

[Johnny Chen]

Author: johnny
Date: Fri Apr 15 17:49:08 2011
New Revision: 129618

URL: http://llvm.org/viewvc/llvm-project?rev=129618&view=rev
Log:
A8.6.315 VLD3 (single 3-element structure to all lanes)
The a bit must be encoded as 0.

rdar://problem/9292625

Added:
    llvm/trunk/test/MC/Disassembler/ARM/invalid-VLD3DUPd32_UPD-thumb.txt
Modified:
    llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp

Modified: llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp?rev=129618&r1=129617&r2=129618&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp (original)
+++ llvm/trunk/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp Fri Apr 15 17:49:08 2011
@@ -2683,6 +2683,12 @@
       // Now we can calculate the alignment!
       if (a)
         alignment = elem * data_size;
+    } else {
+      if (a) {
+        // A8.6.315 VLD3 (single 3-element structure to all lanes)
+        // The a bit must be encoded as 0.
+        return false;
+      }
     }
   } else {
     // Multiple n-element structures with type encoded as Inst{11-8}.

Added: llvm/trunk/test/MC/Disassembler/ARM/invalid-VLD3DUPd32_UPD-thumb.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/ARM/invalid-VLD3DUPd32_UPD-thumb.txt?rev=129618&view=auto
==============================================================================
--- llvm/trunk/test/MC/Disassembler/ARM/invalid-VLD3DUPd32_UPD-thumb.txt (added)
+++ llvm/trunk/test/MC/Disassembler/ARM/invalid-VLD3DUPd32_UPD-thumb.txt Fri Apr 15 17:49:08 2011
@@ -0,0 +1,11 @@
+# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 |& grep {invalid instruction encoding}
+
+# Opcode=871 Name=VLD3DUPd32_UPD Format=ARM_FORMAT_NLdSt(30)
+#  31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
+# -------------------------------------------------------------------------------------------------
+# | 1: 1: 1: 1| 0: 1: 0: 0| 1: 0: 1: 0| 0: 0: 1: 0| 0: 0: 1: 0| 1: 1: 1: 0| 1: 0: 0: 1| 0: 0: 1: 0|
+# -------------------------------------------------------------------------------------------------
+# 
+# A8.6.315 VLD3 (single 3-element structure to all lanes)
+# The a bit must be encoded as 0.
+0xa2 0xf9 0x92 0x2e