[llvm-commits] [llvm] r129184 - in /llvm/trunk/test/CodeGen: ARM/2010-05-18-PostIndexBug.ll CellSPU/v2f32.ll

[Chris Lattner]

Author: lattner
Date: Fri Apr  8 21:31:26 2011
New Revision: 129184

URL: http://llvm.org/viewvc/llvm-project?rev=129184&view=rev
Log:
don't test for codegen of 'store undef'

Modified:
    llvm/trunk/test/CodeGen/ARM/2010-05-18-PostIndexBug.ll
    llvm/trunk/test/CodeGen/CellSPU/v2f32.ll

Modified: llvm/trunk/test/CodeGen/ARM/2010-05-18-PostIndexBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2010-05-18-PostIndexBug.ll?rev=129184&r1=129183&r2=129184&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/2010-05-18-PostIndexBug.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/2010-05-18-PostIndexBug.ll Fri Apr  8 21:31:26 2011
@@ -7,13 +7,13 @@
 define zeroext i8 @t(%struct.foo* %this) noreturn optsize {
 entry:
 ; ARM:       t:
-; ARM:       str r0, [r1], r0
+; ARM:       str r2, [r1], r0
 
 ; THUMB:     t:
 ; THUMB-NOT: str r0, [r1], r0
-; THUMB:     str r0, [r1]
+; THUMB:     str r2, [r1]
   %0 = getelementptr inbounds %struct.foo* %this, i32 0, i32 1 ; <i64*> [#uses=1]
-  store i32 undef, i32* inttoptr (i32 8 to i32*), align 8
+  store i32 0, i32* inttoptr (i32 8 to i32*), align 8
   br i1 undef, label %bb.nph96, label %bb3
 
 bb3:                                              ; preds = %entry

Modified: llvm/trunk/test/CodeGen/CellSPU/v2f32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/CellSPU/v2f32.ll?rev=129184&r1=129183&r2=129184&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/CellSPU/v2f32.ll (original)
+++ llvm/trunk/test/CodeGen/CellSPU/v2f32.ll Fri Apr  8 21:31:26 2011
@@ -33,6 +33,7 @@
  ret %vec %1
 }
 
+; CHECK: test_splat:
 define %vec @test_splat(float %param ) {
 ;CHECK: lqa
 ;CHECK: shufb
@@ -43,16 +44,17 @@
 }
 
 define void @test_store(%vec %val, %vec* %ptr){
-
+; CHECK: test_store:
 ;CHECK: stqd 
-  store %vec undef, %vec* null
+  store %vec zeroinitializer, %vec* null
 
-;CHECK: stqd $3, 0(${{.}})
+;CHECK: stqd $3, 0(${{.*}})
 ;CHECK: bi $lr
   store %vec %val, %vec* %ptr
   ret void
 }
 
+; CHECK: test_insert:
 define %vec @test_insert(){
 ;CHECK: cwd
 ;CHECK: shufb $3
@@ -61,6 +63,8 @@
   ret %vec %rv
 }
 
+; CHECK: test_unaligned_store:
+
 define void @test_unaligned_store()  {
 ;CHECK:	cdd
 ;CHECK:	shufb
@@ -68,7 +72,7 @@
   %data = alloca [4 x float], align 16         ; <[4 x float]*> [#uses=1]
   %ptr = getelementptr [4 x float]* %data, i32 0, i32 2 ; <float*> [#uses=1]
   %vptr = bitcast float* %ptr to  <2 x float>* ; <[1 x <2 x float>]*> [#uses=1]
-  store <2 x float> undef, <2 x float>* %vptr
+  store <2 x float> zeroinitializer, <2 x float>* %vptr
   ret void
 }